Datasheet > 74HC4016U

74HC4016U

更新时间： 2023-03-15 00:00:00

品牌	Logo	应用领域
恩智浦 - NXP		/
页数	文件大小	规格书
14页	103K
描述
IC QUAD 1-CHANNEL, SGL POLE SGL THROW SWITCH, UUC, Multiplexer or Switch

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数据手册

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74HC4016U 数据手册

Philips Semiconductors

Product speciﬁcation

Quad bilateral switches

74HC/HCT4016

TEST CIRCUIT AND WAVEFORMS

Conditions

TEST

t_PZH

SWITCH

GND

V_is

V_CC

t_PZL

t_PHZ

t_PLZ

others

V_CC

GND

V_CC

GND

V_CC

GND

pulse

open

C_L= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

R_T= termination resistance should be equal to the output

impedance Z_Oof the pulse generator.

t_r= t_f= 6 ns; when measuring f_max, there is no constraint

t_r, t_fwith 50% duty factor.

t_r; t_f

FAMILY

AMPLITUDE

V_M

f_max

;

OTHER

PULSE WIDTH

74HC

74HCT

V_CC

3.0 V

50%

1.3 V

< 2 ns

6 ns

Fig.18 Test circuit for measuring AC performance.

C_L= load capacitance including jig and probe capacitance

(see AC CHARACTERISTICS for values).

R_T= termination resistance should be equal to the output

impedance Z_Oof the pulse generator.

t_r= t_f= 6 ns; when measuring f_max, there is no constraint

t_r, t_fwith 50% duty factor.

t_r; t_f

FAMILY

AMPLITUDE

V_M

f_max

;

OTHER

PULSE WIDTH

74HC

74HCT

V_CC

3.0 V

50%

1.3 V

< 2 ns

6 ns

Fig.19 Input pulse definitions.

PACKAGE OUTLINES

See “74HC/HCT/HCU/HCMOS Logic Package Outlines”.

December 1990

1...11 12 1314

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