74HC40104

更新时间： 2024-01-02 03:49:52

品牌	Logo	应用领域
恩智浦 - NXP		移位寄存器
页数	文件大小	规格书
8页	64K
描述
4-bit bidirectional universal shift register; 3-state

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技术参数
数据手册

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74HC40104 技术参数

生命周期：	Active	包装说明：	TSSOP,
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.5	Is Samacsys：	N
计数方向：	BIDIRECTIONAL	系列：	HC/UH
JESD-30 代码：	R-PDSO-G16	长度：	5 mm
逻辑集成电路类型：	PARALLEL IN PARALLEL OUT	位数：	4
功能数量：	1	端子数量：	16
最高工作温度：	125 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	TRUE
封装主体材料：	PLASTIC/EPOXY	封装代码：	TSSOP
封装形状：	RECTANGULAR	封装形式：	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
传播延迟（tpd）：	255 ns	认证状态：	Not Qualified
座面最大高度：	1.1 mm	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	表面贴装：	YES
技术：	CMOS	温度等级：	AUTOMOTIVE
端子形式：	GULL WING	端子节距：	0.65 mm
端子位置：	DUAL	触发器类型：	POSITIVE EDGE
宽度：	4.4 mm	最小 fmax：	67 MHz
Base Number Matches：	1

74HC40104 数据手册

Philips Semiconductors

Product speciﬁcation

4-bit bidirectional universal shift

74HC/HCT40104

In the parallel-load mode (S₀and S₁are HIGH), data is

loaded into the associated flip-flop and appears at the

output after the positive transition of the clock input (CP).

FEATURES

• Synchronous parallel or serial operating

• 3-state outputs

During loading, serial data flow is inhibited. Shift-right and

shift-left are accomplished synchronously on the positive

• Output capability: bus driver

• I_CCcategory: MSI

clock edge with serial data entered at the shift-right (D_SR

and shift-left (D_SL) serial inputs, respectively.

)

GENERAL DESCRIPTION

Clearing the register is accomplished by setting both mode

controls (S₀and S₁) LOW and clocking the register. When

the output enable input (OE) is LOW, all outputs assume

the high-impedance OFF-state (Z).

The 74HC/HCT40104 are high-speed Si-gate CMOS

devices and are pin compatible with the “40104” of the

“4000B” series. They are specified in compliance with

JEDEC standard no. 7A.

APPLICATIONS

The 74HC/HCT40104 are universal shift registers

featuring parallel inputs, parallel outputs, shift-right and

shift-left serial inputs and 3-state outputs allowing the

devices to be used in bus-organized systems.

• Arithmetic unit bus registers

• Serial/parallel conversion

• General-purpose register for bus organized systems

• General-purpose registers

QUICK REFERENCE DATA

GND = 0 V; T_amb= 25 °C; t_r= t_f= 6 ns

TYPICAL

SYMBOL

PARAMETER

CONDITIONS

UNIT

HCT

t_PHL/ t_PLH

f_max

propagation delay CP to Q_n

maximum clock frequency

input capacitance

C_L= 15 pF; V_CC= 5 V

3.5

MHz

C_I

C_PD

power dissipation capacitance per package notes 1 and 2

Notes

1. C_PDis used to determine the dynamic power dissipation (P_Din µW):

P_D= C_PD× V_CC²× f_i+ ∑ (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz

f_o= output frequency in MHz

∑ (C_L× V_CC²× f_o) = sum of outputs

C_L= output load capacitance in pF

V_CC= supply voltage in V

2. For HC the condition is V_I= GND to V_CC

For HCT the condition is V_I= GND to V_CC− 1.5 V

ORDERING INFORMATION

See “74HC/HCT/HCU/HCMOS Logic Package Information”.

December 1990

123 4 5 6 7 8

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与74HC40104相关器件

型号	品牌	描述	获取价格	数据表
74HC40104D	NXP	IC HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT,	获取价格
74HC40104DB	NXP	IC HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT,	获取价格
74HC40104D-T	PHILIPS	Shift Register, 4-Bit, CMOS, PDSO16,	获取价格
74HC40104D-T	NXP	IC HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT,	获取价格
74HC40104N	NXP	IC HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT,	获取价格
74HC40104PW	NXP	IC HC/UH SERIES, 4-BIT BIDIRECTIONAL PARALLEL IN PARALLEL OUT SHIFT REGISTER, TRUE OUTPUT,	获取价格

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