Datasheet > 74HC32BQ-Q100

74HC32BQ-Q100

更新时间： 2024-01-29 12:36:50

品牌	Logo	应用领域
安世 - NEXPERIA		/
页数	文件大小	规格书
13页	229K
描述
Quad 2-input OR gate

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中文翻译

获取价格

数据手册

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74HC32BQ-Q100 数据手册

Nexperia

74HC32-Q100; 74HCT32-Q100

Quad 2-input OR gate

Symbol Parameter

Conditions

25 °C

-40 °C to -40 °C to Unit

+85 °C

+125 °C

Min Typ Max

Max

74HCT32-Q100

t_pd

propagation delay nA, nB to nY; see Fig. 6

V_CC= 4.5 V

[1]

V_CC= 5.0 V; C_L= 15 pF

t_t

transition time

V_CC= 4.5 V; see Fig. 6

[2]

[3]

C_PD

power dissipation per package; V_I= GND to V_CC- 1.5 V

capacitance

[1] t_pdis the same as t_PHLand t_PLH

[2] t_tis the same as t_THLand t_TLH

[3] C_PDis used to determine the dynamic power dissipation (P_Din μW):

P_D= C_PD× V_CC²× f_i× N + Σ (C_L× V_CC²× f_o) where:

f_i= input frequency in MHz;

f_o= output frequency in MHz;

C_L= output load capacitance in pF;

V_CC= supply voltage in V;

N = number of inputs switching;

Σ (C_L× V_CC²× f_o) = sum of outputs.

10.1. Waveforms

nA, nB input

GND

PLH

PHL

nY output

TLH

THL

aaa-004037

Measurement points are given in Table 8.

V_OLand V_OHare typical voltage output levels that occur with the output load.

Fig. 6. Input to output propagation delays and output transition times

Table 8. Measurement points

Type

Input

V_M

Output

V_M

V_X

V_Y

74HC32-Q100

74HCT32-Q100

0.5V_CC

1.3 V

0.5V_CC

1.3 V

0.1V_CC

0.9V_CC

74HC_HCT32_Q100

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 30 September 2019

6 / 13

1...3 4 567 8 9...13

中文翻译

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