Datasheet > 74FCT16374CTPA

74FCT16374CTPA

更新时间： 2024-01-08 13:59:34

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艾迪悌 - IDT		/
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数据手册

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74FCT16374CTPA 数据手册

IDT54/74FCT16374AT/CT/ET

FASTCMOS16-BITREGISTER(3-STATE)

MILITARYANDINDUSTRIALTEMPERATURERANGES

TESTCIRCUITSANDWAVEFORMS

VCC

SWITCHPOSITION

7.0V

Test

Switch

Closed

Open

500Ω

Open Drain

Disable Low

Enable Low

VOUT

VIN

Pulse

Generator

D.U.T.

50pF

All Other Tests

500Ω

DEFINITIONS:

CL = Load capacitance: includes jig and probe capacitance.

RT = Termination resistance: should be equal to ZOUT of the Pulse Generator.

Test Circuits for All Outputs

DATA

1.5V

INPUT

LOW-HIGH-LOW

tSU

1.5V

PULSE

1.5V

TIMING

INPUT

ASYNCHRONOUS CONTROL

tREM

PRESET

CLEAR

ETC.

1.5V

HIGH-LOW-HIGH

PULSE

1.5V

SYNCHRONOUS CONTROL

PRESET

1.5V

CLEAR

tSU

Pulse Width

CLOCK ENABLE

ETC.

Set-up, Hold, and Release Times

ENABLE

DISABLE

1.5V

SAME PHASE

CONTROL

INPUT

1.5V

INPUT TRANSITION

tPLH

tPHL

tPZL

tPLZ

VOH

1.5V

VOL

OUTPUT

3.5V

1.5V

3.5V

VOL

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

0.3V

1.5V

tPZH

tPHZ

OPPOSITE PHASE

INPUT TRANSITION

VOH

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

Propagation Delay

Enable and Disable Times

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-HIGH.

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns.

1...3 4 567

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