74F378SJ

更新时间： 2024-09-24 22:37:11

品牌	Logo	应用领域
飞兆/仙童 - FAIRCHILD		/
页数	文件大小	规格书
6页	59K
描述
Parallel D-Type Register with Enable

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74F378SJ 数据手册

April 1988

Revised August 1999

74F378

Parallel D-Type Register with Enable

General Description

The 74F378 is a 6-bit register with a buffered common

Enable. This device is similar to the 74F174, but with com-

mon Enable rather than common Master Reset.

Features

■ 6-bit high-speed parallel register

■ Positive edge-triggered D-type inputs

■ Fully buffered common clock and enable inputs

■ Input clamp diodes limit high-speed termination effects

■ Full TTL and CMOS compatible

Ordering Code:

Order Number Package Number

Package Description

74F378SC

74F378SJ

74F378PC

M16A

M16D

N16E

16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow

16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide

Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Logic Symbols

Connection Diagram

IEEE/IEC

DS009526

www.fairchildsemi.com

12 3 4 5 6

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型号	品牌	获取价格	描述	数据表
74F378SJX	TI	获取价格	F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, TRUE OUTPUT, PDSO16, 0.300 INCH, EIAJ,
74F378SJX	ROCHESTER	获取价格	D Flip-Flop, F/FAST Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, PDSO
74F378VC	FAIRCHILD	获取价格	D Flip-Flop, F/FAST Series, 1-Func, Positive Edge Triggered, 6-Bit, True Output, TTL, PDSO
74F379	FAIRCHILD	获取价格	Quad Parallel Register with Enable
74F379	NSC	获取价格	Quad Parallel Register with Enable
74F379_00	FAIRCHILD	获取价格	Quad Parallel Register with Enable
74F379A	NXP	获取价格	Quad register
74F379AD	NXP	获取价格	暂无描述
74F379AD-T	NXP	获取价格	暂无描述
74F379AN	NXP	获取价格	IC F/FAST SERIES, POSITIVE EDGE TRIGGERED D FLIP-FLOP, COMPLEMENTARY OUTPUT, PDIP16, FF/La