Datasheet > 74ACQ544DC

74ACQ544DC

更新时间： 2024-01-27 02:09:17

品牌	Logo	应用领域
德州仪器 - TI		输出元件
页数	文件大小	规格书
12页	198K
描述
AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDIP24, CERAMIC, DIP-24

阅读下载

获取价格

技术参数
数据手册

如果您发现信息不准确，欢迎纠错

74ACQ544DC 技术参数

生命周期：	Obsolete	零件包装代码：	DIP
包装说明：	DIP,	针数：	24
Reach Compliance Code：	unknown	HTS代码：	8542.39.00.01
风险等级：	5.62	Is Samacsys：	N
其他特性：	WITH INDEPENDENT OUTPUT ENABLE FOR EACH DIRECTION	系列：	AC
JESD-30 代码：	R-GDIP-T24	逻辑集成电路类型：	REGISTERED BUS TRANSCEIVER
位数：	8	功能数量：	1
端口数量：	2	端子数量：	24
最高工作温度：	85 °C	最低工作温度：	-40 °C
输出特性：	3-STATE	输出极性：	INVERTED
封装主体材料：	CERAMIC, GLASS-SEALED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
传播延迟（tpd）：	12.5 ns	认证状态：	Not Qualified
座面最大高度：	5.715 mm	最大供电电压 (Vsup)：	6 V
最小供电电压 (Vsup)：	2 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	NO	技术：	CMOS
温度等级：	INDUSTRIAL	端子形式：	THROUGH-HOLE
端子节距：	2.54 mm	端子位置：	DUAL
宽度：	7.62 mm	Base Number Matches：	1

74ACQ544DC 数据手册

Pin Names

Description

OEAB

OEBA

CEAB

CEBA

LEAB

LEBA

A-to-B Output Enable Input (Active LOW)

B-to-A Output Enable Input (Active LOW)

A-to-B Enable Input (Active LOW)

B-to-A Enable Input (Active LOW)

A-to-B Latch Enable Input (Active LOW)

B-to-A Latch Enable Input (Active LOW)

A-to-B Data Inputs or

A –A

B-to-A TRI-STATE Outputs

B-to-A Data Inputs or

B –B

A-to-B TRI-STATE Outputs

Functional Description

Data I/O Control Table

The ’ACQ/’ACTQ544 contains two sets of eight D-type

latches, with separate input and output controls for each

set. For data flow from A to B, for example, the A-to-B En-

able (CEAB) input must be LOW in order to enter data from

Inputs

CEAB LEAB OEAB

Latch Status Output Buffers

Latched

Transparent

High Z

A –A or take data from B –B , as indicated in the Data I/

O Control Table. With CEAB LOW, a LOW signal on the A-

to-B Latch Enable (LEAB) input makes the A-to-B latches

transparent; a subsequent LOW-to-HIGH transition of the

LEAB signal puts the A latches in the storage mode and

their outputs no longer change with the A inputs. With CEAB

and OEAB both LOW, the TRI-STATE B output buffers are

active and reflect the data present at the output of the A

latches. Control of data flow from B to A is similar, but using

the CEBA, LEBA and OEBA inputs.

High Z

Driving

HIGH Voltage Level

LOW Voltage Level

Immaterial

A-to-B data flow shown; B-to-A flow control

is the same, except using CEBA, LEBA and OEBA

123 4 5 6 7...12

下载PDF

与74ACQ544DC相关器件

型号	品牌	描述	获取价格	数据表
74ACQ544FC	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP24, CERAMIC, FP-24	获取价格
74ACQ544FCQR	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, CDFP24, CERAMIC, DFP-24	获取价格
74ACQ544PC	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24, PLASTIC, DIP-24	获取价格
74ACQ544PCQR	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PDIP24, 0.300 INCH, PLASTIC, DIP	获取价格
74ACQ544QC	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQCC28, PLASTIC, LCC-28	获取价格
74ACQ544QCX	TI	AC SERIES, 8-BIT REGISTERED TRANSCEIVER, INVERTED OUTPUT, PQCC28, PLASTIC, LCC-28	获取价格