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74AC257M PDF预览

74AC257M

更新时间: 2024-11-19 00:00:47
品牌 Logo 应用领域
意法半导体 - STMICROELECTRONICS 解复用器逻辑集成电路光电二极管
页数 文件大小 规格书
12页 203K
描述
QUAD 2 CHANNEL MULTIPLEXER 3-STATE

74AC257M 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
零件包装代码:SOIC包装说明:SOP-16
针数:16Reach Compliance Code:not_compliant
HTS代码:8542.39.00.01风险等级:5.1
Is Samacsys:N系列:AC
JESD-30 代码:R-PDSO-G16JESD-609代码:e0
长度:9.9 mm负载电容(CL):50 pF
逻辑集成电路类型:MULTIPLEXER最大I(ol):0.012 A
功能数量:4输入次数:2
输出次数:1端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:PLASTIC/EPOXY封装代码:SOP
封装等效代码:SOP16,.25封装形状:RECTANGULAR
封装形式:SMALL OUTLINE峰值回流温度(摄氏度):NOT SPECIFIED
电源:3.3/5 VProp。Delay @ Nom-Sup:9 ns
传播延迟(tpd):9 ns认证状态:Not Qualified
座面最大高度:1.75 mm子类别:Multiplexer/Demultiplexers
最大供电电压 (Vsup):6 V最小供电电压 (Vsup):2 V
标称供电电压 (Vsup):3.3 V表面贴装:YES
技术:CMOS温度等级:MILITARY
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:1.27 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:3.9 mm
Base Number Matches:1

74AC257M 数据手册

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74AC257  
QUAD 2 CHANNEL MULTIPLEXER (3-STATE)  
HIGH SPEED: t = 4.5ns (TYP.) at V = 5V  
PD CC  
LOW POWER DISSIPATION:  
I
= 4µA(MAX.) at T =25°C  
CC  
A
HIGH NOISE IMMUNITY:  
= V = 28 % V (MIN.)  
50TRANSMISSION LINE DRIVING  
V
NIH  
NIL  
CC  
DIP  
SOP  
TSSOP  
T & R  
CAPABILITY  
SYMMETRICAL OUTPUT IMPEDANCE:  
|I | = I = 24mA (MIN)  
OH  
OL  
BALANCED PROPAGATION DELAYS:  
ORDER CODES  
PACKAGE  
t
t
PLH  
PHL  
TUBE  
OPERATING VOLTAGE RANGE:  
(OPR) = 2V to 6V  
DIP  
SOP  
74AC257B  
74AC257M  
V
CC  
74AC257MTR  
74AC257TTR  
PIN AND FUNCTION COMPATIBLE WITH  
74 SERIES 257  
IMPROVED LATCH-UP IMMUNITY  
TSSOP  
high impedance state. If SELECT input is held  
LOW, "A" data is selected, when SELECT input is  
held HIGH, "B" data is chosen.  
All inputs and outputs are equipped with  
protection circuits against static discharge, giving  
them 2KV ESD immunity and transient excess  
voltage.  
DESCRIPTION  
The 74AC257 is an advanced high-speed CMOS  
QUAD 2-CHANNEL MULTIPLEXER (3-STATE)  
fabricated with sub-micron silicon gate and  
2
double-layer metal wiring C MOS tecnology.  
It is composed of four independent 2-channel  
multiplexer with common SELECT and ENABLE  
(OE) inputs. It is a non-inverting multiplexer. When  
the OE input is held HIGH,all the output become in  
PIN CONNECTION AND IEC LOGIC SYMBOLS  
April 2001  
1/11  

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