74AC16245DL

更新时间： 2024-01-22 04:36:15

品牌	Logo	应用领域
德州仪器 - TI		总线收发器逻辑集成电路光电二极管输出元件
页数	文件大小	规格书
6页	121K
描述
16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

74AC16245DL 数据手册

54AC16245, 74AC16245

16-BIT BUS TRANSCEIVERS

WITH 3-STATE OUTPUTS

SCAS235A – MARCH 1990 – REVISED APRIL 1996

operating characteristics, V

= 5 V, T = 25°C

PARAMETER

TEST CONDITIONS

= 50 pF, f = 1 MHz

TYP

UNIT

Outputs enabled

Outputs disabled

Power dissipation capacitance per latch

PARAMETER MEASUREMENT INFORMATION

2 × V

Open

GND

TEST

Open

500 Ω

PLH PHL

From Output

Under Test

2 × V

GND

PLZ PZL

PHZ PZH

= 50 pF

500 Ω

(see Note A)

LOAD CIRCUIT

Output

Control

(low-level

enabling)

50%

0 V

PZL

PLZ

Output

Waveform 1

Input

50%

50% V

0 V

20% V

80% V

S1 at 2 × V

(see Note B)

PLH

PHZ

PHL

PZH

Output

Waveform 2

S1 at GND

0 V

50% V

Output

50% V

(see Note B)

VOLTAGE WAVEFORMS

NOTES: A.

includes probe and jig capacitance.

B. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by the output control.

Waveform 2 is for an output with internal conditions such that the output is high except when disabled by the output control.

C. All input pulses are supplied by generators having the following characteristics: PRR ≤ 1 MHz, Z = 50 Ω, t = 3 ns, t = 3 ns.

D. The outputs are measured one at a time with one input transition per measurement.

Figure 1. Load Circuit and Voltage Waveforms

POST OFFICE BOX 655303 • DALLAS, TEXAS 75265

1 2 3 456

下载PDF

与74AC16245DL相关器件

型号	品牌	描述	获取价格	数据表
74AC16245DLG4	TI	16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS	获取价格
74AC16245DLR	TI	16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS	获取价格
74AC16245DLRG4	TI	16-BIT BUS TRANSCEIVERS WITH 3-STATE OUTPUTS	获取价格
74AC16245DLX	ETC	Logic IC	获取价格
74AC16245TTR	STMICROELECTRONICS	16-BIT BUS TRANSCEIVER WITH 3-STATE OUTPUTS (NON INVERTED)	获取价格
74AC162FC	FAIRCHILD	Decade Counter, AC Series, Synchronous, Positive Edge Triggered, 4-Bit, Up Direction, CMOS	获取价格