73S8023C-DB

更新时间： 2024-01-14 13:34:04

品牌	Logo	应用领域
美信 - MAXIM		/
页数	文件大小	规格书
19页	816K
描述
Demo Board User Manual

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技术参数
数据手册

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73S8023C-DB 技术参数

生命周期：	Transferred	包装说明：	5 X 5 MM, LEAD FREE, QFN-32
Reach Compliance Code：	unknown	风险等级：	5.59
Is Samacsys：	N	模拟集成电路 - 其他类型：	ANALOG CIRCUIT
JESD-30 代码：	S-XQCC-N32	长度：	5 mm
功能数量：	1	端子数量：	32
最高工作温度：	85 °C	最低工作温度：	-40 °C
封装主体材料：	UNSPECIFIED	封装代码：	HVQCCN
封装形状：	SQUARE	封装形式：	CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE
认证状态：	Not Qualified	座面最大高度：	0.9 mm
最大供电电压 (Vsup)：	3.6 V	最小供电电压 (Vsup)：	2.7 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	5 mm
Base Number Matches：	1

73S8023C-DB 数据手册

UM_8023C_027

73S8023C Demo Board User Manual

3 Hardware Description

3.1 Demo Board Connectors, Jumpers and Test Points

Table 1 describes the 73S8023C Demo Board connectors, jumpers and test points. The Item # in Table 1

refers to Figure 3.

Table 1: 73S8023C Demo Board Connector, Jumper and Test Points

Schematic/

Item

Silkscreen

Reference

Name

Function

Connectors:

Auxiliary Interface / 73S8023C auxiliary interface (I/OUC, AUX1UC,

5V Board Power

AUX2UC), external clock (SCLK) and interrupt (OFF)

pins. The external clock (SCLK) can be left open when

JP1 is in position XTAL.

The 5V power supply is unused and must be left open

and JP2 must be inserted in position 3.3V.

3.3V Board Power / 3.3V board power supply and the 73S8023C host

Digital Control

Signals

control signals RSTIN, CMDVCC, 5V/#V, PWRDWN,

CLKDIV2 and CLKDIV1.

Smart Card

Connector

Smart card connector.

When inserting a card (credit card size format), contacts

must face up.

Smart Card

Connector

SIM/SAM smart card format connector.

J6 is wired in parallel to the smart card connector J5

(underneath the PCB). No SIM/SAM should be inserted

when using the credit-card size connector J5.

Jumpers:

JP1

JP2

Clock Selection

VPC Select

Jumper to select between a crystal or an external clock

as the frequency reference to the device. The default

setting is for a crystal.

Jumper to select the value of the power supply for the

smart card DC-DC converter (73S8023C input VPC).

To support both card voltages, JP2 must be set to

position 3.3V. The default setting is 3.3V.

JP3

VDD Select

–

Jumper to select the digital voltage which supplies the

73S8023C. Must be set for 3.3V.

JP4

JP5

JP6

Not used.

Card Polarity

Detect Select

The setting of JP5 and JP6 depends on the type of

smart card connector used (nominally open or closed)

and which 73S8023C card presence switch input is

used. The switch is nominally open for the 73S8023C

Demo Board. The jumpers can be set to:

1. Use of PRES (default): JP5 set to PRES; JP6 set

to VDD.

2. Use of PRES: JP5 set to PREB; JP6 set to GND.

JP7

JP8

JP9

CLKSEL

Three pin header. Set to VDD for sync operation.

Three pin header. Set to VDD for normal operation.

Two pin header. Outputs the buffered version of XTALIN.

Two pin header. Controls clock signal when CLKSEL=1.

CLKOUT

STROBE

JP10

Rev. 1.3

1...4 5 678 9 10...19

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与73S8023C-DB相关器件

型号	品牌	描述	获取价格	数据表
73S8023C-IM/F	TERIDIAN	Smart Card Interface	获取价格
73S8023C-IM/F1	MAXIM	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32	获取价格
73S8023C-IMR/F	TERIDIAN	Smart Card Interface	获取价格
73S8023C-IMR/F1	MAXIM	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32	获取价格
73S8023C-IMR/F2	MAXIM	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32	获取价格
73S8023C-IMR/F3	MAXIM	Analog Circuit, 1 Func, 5 X 5 MM, LEAD FREE, QFN-32	获取价格

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