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73S8009C-32IMR/F

更新时间： 2024-01-23 04:39:42

品牌	Logo	应用领域
TERIDIAN		电源电路电源管理电路 PC
页数	文件大小	规格书
33页	351K
描述
Versatile Power Management and Smart Card Interface IC

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技术参数
数据手册

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73S8009C-32IMR/F 技术参数

生命周期：	Transferred	包装说明：	ROHS COMPLIANT, QFN-32
Reach Compliance Code：	unknown	风险等级：	5.68
Is Samacsys：	N	其他特性：	DETECTION THRESHOLD VOLTAGE IS 3.9 V
可调阈值：	NO	模拟集成电路 - 其他类型：	POWER SUPPLY SUPPORT CIRCUIT
JESD-30 代码：	S-XQCC-N32	长度：	5 mm
信道数量：	1	功能数量：	1
端子数量：	32	最高工作温度：	85 °C
最低工作温度：	-40 °C	封装主体材料：	UNSPECIFIED
封装代码：	VQCCN	封装形状：	SQUARE
封装形式：	CHIP CARRIER, VERY THIN PROFILE	认证状态：	Not Qualified
座面最大高度：	0.9 mm	最大供电电压 (Vsup)：	3.6 V
最小供电电压 (Vsup)：	3 V	标称供电电压 (Vsup)：	3.3 V
表面贴装：	YES	温度等级：	INDUSTRIAL
端子形式：	NO LEAD	端子节距：	0.5 mm
端子位置：	QUAD	宽度：	5 mm
Base Number Matches：	1

73S8009C-32IMR/F 数据手册

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73S8009C Data Sheet

DS_8009C_025

Name

Equivalent

Circuit

Type

Description

(QFN32) (QFN20)

VPC

PSI

Figure 14 Power supply source for main voltage

converter circuit. A 10 µF and a 0.1 µF

ceramic capacitor must be connected to this

pin.

VBAT

VBUS

LIN

N/A

Alternate power source input, typically from

two series cells, V > 4 V.

Alternate power source input from USB

connector or hub.

PSI

Figure 14

Connection to 10 µH inductor for internal step

up converter. Note: inductor must be rated for

400 mA maximum peak current.

PSO

Figure 14 Intermediate output of main converter circuit.

Requires an external 4.7 µF low ESR filter

capacitor to GND

GND

28,31

–

Ground.

Microcontroller Interface

N/A

Figure 19 When CS = 1, the control and signal pins are

configured normally. When CS is set low,

CMDVCC%, RSTIN, and CMDVCC#. are

latched. I/OUC, AUX1UC, and AUX2UC are

set to high-impedance pull-up mode and do not

pass data to or from the smart card. Signals

RDY and OFF are disabled to prevent a low

output and the internal pull-up resistors are

disconnected.

OFF

Figure 13 Interrupt signal to the processor. Active Low -

Multi-function indicating fault conditions and

card presence. Open drain output configuration

– It includes an internal 20 kΩ pull-up to V_DD.

Pull-up is disabled in Power down state and CS

= 0 modes.

I/OUC

Figure 18

System controller data I/O to/from the card.

Includes a pull-up resistor to V_DD.

AUX1UC

AUX2UC

N/A

System controller auxiliary data I/O to/from the

card. Includes a pull-up resistor to V_DD.

System controller auxiliary data I/O to/from the

card. Includes a pull-up resistor to V_DD.

Rev. 1.4

1...5 6 789 10 11...33

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