IDT71V416YS, IDT71V416YL 3.3V CMOS Static RAM
for Automotive Applications 4 Meg (256K x 16-Bit)
Automotive Temperature Ranges
DC Electrical Characteristics
(VDD = Min. to Max., Automotive Temperature Ranges)
Automotive
Temperature
Grade
IDT71V416
Symbol
Parameter
Input Leakage Current
Test Conditions
Min.
Max.
Unit
___
___
___
___
___
1 and 2
3 and 4
1 and 2
3 and 4
5
1
5
1
|ILI|
VDD = Max., VIN = VSS to VDD
µA
|ILO|
Output Leakage Current
VDD = Max., CS = VIH, VOUT = VSS to VDD
µA
V
VOL
VOH
Output Low Voltage
Output High Voltage
IOL = 8mA, VDD = Min.
IOH = -4mA, VDD = Min.
0.4
___
2.4
V
6817 tbl 07
DC Electrical Characteristics(1, 2, 3)
(VDD = Min. to Max., VLC = 0.2V, VHC = VDD – 0.2V, Automotive Temperature Ranges)
71V416S/L12
71V416S/L15
Automotive Grade
71V416S/L20
Automotive Grade
Symbol
Parameter
Automotive Grade
Unit
1
2
3 and 4
1
2
3 and 4
1
2
3 and 4
S
L
Max.
Max.
130
120
120
110
110
100
125
115
115
105
105
95
120
110
110
100
100
90
Dynamic Operating Current
CS < VLC, Outputs Open, VDD = Max., f = fMAX
CC
I
mA
mA
(3)
Ty p . (4)
85
85
85
80
80
80
80
80
80
S
L
S
L
Max.
Max.
Max.
65
50
20
10
65
50
20
10
65
45
20
10
55
45
20
10
55
45
20
10
50
40
20
10
50
40
20
10
50
40
20
10
50
40
20
10
Dynamic Standby Power Supply Current
CS > VHC, Outputs Open, VDD = Max., f = fMAX
SB
I
(3)
Full Standby Power Supply Current (static)
CS > VHC, Outputs Open, VDD = Max., f = 0
SB1
I
mA
(3)
IDT71V416S/71MVax4. 16L
6817 tbl 8
NOTES:
1. All values are maximum guaranteed values.
2. All inputs switch between 0.2V (Low) and VDD -0.2V (High).
3. fMAX = 1/tRC (all address inputs are cycling at fMAX); f = 0 means no address input lines are changing.
4. Typical values are measured at 3.3V, 25oC and with equal read and write cycles. This parameter is guaranteed by device characterization but is not production tested.
3.3V
AC Test Loads
+1.5V
320
50
OUT
DATA
I/O
Z = 50
0
5pF*
350
30pF
6817 drw 03
6817 drw 04
Figure 1. AC Test Load
*Including jig and scope capacitance.
Figure 2. AC Test Load
(for tCLZ, tOLZ, tCHZ, tOHZ, tOW, and tWHZ)
7
6
5
4
3
tAA, tACS
(Typical, ns)
AC Test Conditions
Input Pulse Levels
GND to 3.0V
1.5ns
2
1
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
AC Test Load
1.5V
1.5V
180
8 20 40 60 80 100 120 140 160
CAPACITANCE (pF)
200
6817 drw 05
Figures 1,2 and 3
Figure 3. Output Capacitive Derating
6817 tbl 09
6.442