71M6513/71M6513H
3-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
SEPTEMBER 2011
RESETZ....................................................................................................................95
COMPARATORS ......................................................................................................96
RAM AND FLASH MEMORY.....................................................................................96
FLASH MEMORY TIMING.........................................................................................96
EEPROM INTERFACE..............................................................................................96
Recommended External Components......................................................................................97
Packaging Information.............................................................................................................98
Pinout (Top View)......................................................................................................99
Pin Descriptions ........................................................................................................100
I/O Equivalent Circuits: ..............................................................................................102
ORDERING INFORMATION ...................................................................................................103
Figures
Figure 1: IC Functional Block Diagram..........................................................................................................................8
Figure 2: General Topology of a Chopped Amplifier.....................................................................................................10
Figure 3: AFE Block Diagram......................................................................................................................................11
Figure 4: Samples in Multiplexer Cycle .......................................................................................................................14
Figure 5: Accumulation Interval..................................................................................................................................14
Figure 6: Memory Map..............................................................................................................................................16
Figure 7: Interrupt Structure......................................................................................................................................38
Figure 8: DIO Ports Block Diagram.............................................................................................................................39
Figure 9: Oscillator Circuit .........................................................................................................................................42
Figure 10: LCD Voltage Boost Circuitry.......................................................................................................................43
Figure 11: Voltage Range for V1 ................................................................................................................................45
Figure 12: Voltage. Current, Momentary and Accumulated Energy................................................................................49
Figure 13: Timing Relationship between ADC MUX, CE, and Serial Transfers................................................................50
Figure 14: RTM Output Format ..................................................................................................................................51
Figure 15: SSI Timing, (SSI_FPOL = SSI_RDYPOL = 0) ............................................................................................51
Figure 16: SSI Timing, 16-bit Field Example (External Device Delays SRDY).................................................................51
Figure 17: MPU/CE Data Flow....................................................................................................................................52
Figure 18: MPU/CE Communication (Functional).........................................................................................................53
Figure 19: MPU/CE Communication (Processing Sequence)........................................................................................53
Figure 20: Timing Diagram for Voltages, Current and Operation Modes after Power-Up.................................................54
Figure 21: Chop Polarity w/ Automatic Chopping ........................................................................................................56
Figure 22: Sequence with Alternate Multiplexer Cycles ................................................................................................56
Figure 23: Sequence with Alternate Multiplexer Cycles and Controlled Chopping...........................................................57
Figure 24: Wh Accuracy, 0.3A - 200A/240V................................................................................................................77
Figure 25: VARh Accuracy for 0.3A to 200A/240V Performance...................................................................................78
Figure 27: Meter Accuracy over Harmonics at 240V, 30A ............................................................................................78
Figure 29: Resistive Voltage Divider (left), Current Transformer (right).........................................................................79
Figure 30: Resistive Shunt (left), Rogowski Coil (right) ...............................................................................................79
Figure 31: Crystal Frequency over Temperature ..........................................................................................................80
Figure 32: Crystal Compensation ...............................................................................................................................81
Figure 33: Error Band for VREF over Temperature (Regular-Accuracy Parts).................................................................83
© 2005-2011 Teridian Semiconductor Corporation
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