71M6513/71M6513H
3-Phase Energy Meter IC
A Maxim Integrated Products Brand
DATA SHEET
AUGUST 2011
Figure 34: Error Band for VREF over Temperature (High-Accuracy Parts) .....................................................................83
Figure 33: Connecting LCDs ......................................................................................................................................84
Figure 34: LCD Boost Circuit......................................................................................................................................85
Figure 35: EEPROM Connection.................................................................................................................................85
Figure 36: Interfacing RX to a 0-5V Signal..................................................................................................................86
Figure 37: Connection for Optical Components ...........................................................................................................87
Figure 38: Voltage Divider for V1 ...............................................................................................................................87
Figure 39: External Components for RESETZ ..............................................................................................................88
Tables
Table 1: Inputs Selected in Regular and Alternate Multiplexer Cycles.......................................................... 9
Table 2: CE DRAM Locations for ADC Results......................................................................................... 12
Table 3: Standard Meter Equations (inputs shown gray are scanned but not used for calculation).............. 13
Table 4: Stretch Memory Cycle Width ...................................................................................................... 17
Table 5: Internal Data Memory Map......................................................................................................... 18
Table 6: Special Function Registers Locations ......................................................................................... 18
Table 7: Special Function Registers Reset Values.................................................................................... 20
Table 8: PSW Register Flags................................................................................................................... 20
Table 9: PSW bit functions ...................................................................................................................... 21
Table 10: Port Registers.......................................................................................................................... 22
Table 11: Special Function Registers....................................................................................................... 23
Table 12: Baud Rate Generation.............................................................................................................. 24
Table 13: UART Modes........................................................................................................................... 24
Table 14: The S0CON Register................................................................................................................. 24
Table 15: The S1CON register.................................................................................................................. 25
Table 16: The S0CON Bit Functions.......................................................................................................... 25
Table 17: The S1CON Bit Functions.......................................................................................................... 26
Table 18: The TMOD Register................................................................................................................. 26
Table 19: TMOD Register Bit Description................................................................................................. 27
Table 20: Timers/Counters Mode Description........................................................................................... 27
Table 21: The TCON Register .................................................................................................................. 27
Table 22: The TCON Register Bit Functions ............................................................................................. 28
Table 23: Timer Modes............................................................................................................................ 28
Table 24: The PCON Register ................................................................................................................. 28
Table 25: The IEN0 Register (see also Table 32)...................................................................................... 29
Table 26: The IEN0 Bit Functions (see also Table 32)............................................................................... 29
Table 27: The IEN1 Register (see also Tables 30/31)............................................................................... 29
Table 28: The IEN1 Bit Functions (see also Tables 30/31)........................................................................ 29
Table 29: The IP0 Register (see also Table 45)........................................................................................ 30
Table 30: The IP0 bit Functions (see also Table 45) ................................................................................. 30
Table 31: The WDTREL Register............................................................................................................. 30
Table 32: The WDTREL Bit Functions...................................................................................................... 30
Table 33: The IEN0 Register.................................................................................................................... 32
Table 34: The IEN0 Bit Functions............................................................................................................. 32
Table 35: The IEN1 Register ................................................................................................................... 32
Table 36: The IEN1 Bit Functions ............................................................................................................ 32
Table 37: The IEN2 Register ................................................................................................................... 33
Table 38: The IEN2 Bit Functions ............................................................................................................ 33
Page: 6 of 104
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