IDT7164S/L
CMOS Static RAM 64K (8K x 8-Bit)
Military, Commercial, and Industrial Temperature Ranges
AC Electrical Characteristics (VCC = 5.0V ± 10%, All Temperature Ranges)
7164S20 7164S25
7164L20 7164L25
Symbol
Parameter
Unit
Min.
Max.
Min.
Max.
Read Cycle
____
____
t
RC
AA
ACS1
ACS2
Read Cycle Time
20
25
ns
ns
ns
____
____
t
Address Access Time
19
20
25
25
____
____
____
____
(1)
(1)
Chip Select-1 Access Time
t
Chip Select-2 Access Time
25
30
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
____
____
(2)
CLZ1,2
Chip Select-1, 2 to Output in Low-Z
Output Enable to Output Valid
Output Enable to Output in Low-Z
Chip Select-1,2 to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
Chip Select to Power Up Time
Chip Deselect to Power Down Time
5
5
t
____
____
tOE
8
12
____
____
(2)
OLZ
0
0
t
____
____
(2)
CHZ1,2
9
13
t
____
____
(2)
OHZ
8
10
t
____
____
tOH
5
5
____
____
(2)
PU
0
0
t
____
____
(2)
PD
20
25
t
Write Cycle
____
____
____
____
____
____
____
____
____
____
____
____
____
____
t
WC
CW1,2
AW
AS
WP
WR1
WR2
Write Cycle Time
20
15
15
0
25
18
18
0
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
t
Chip Select to End-of-Write
Address Valid to End-of-Write
Address Set-up Time
Write Pulse Width
t
t
t
15
0
21
0
t
Write Recovery Time (CS1, WE)
t
Write Recovery Time (CS
2)
5
5
____
____
(2)
WHZ
Write Enable to Output in High-Z
Data to Write Time Overlap
8
10
t
____
____
t
DW
DH1
DH2
10
0
13
0
____
____
____
____
t
Data Hold from Write Time (CS1, WE)
t
Data Hold from Write Time (CS
2)
5
5
____
____
(2)
OW
Output Active from End-of-Write
4
4
ns
t
2967 tbl 12
NOTES:
1. Both chip selects must be active for the device to be selected.
2. This parameter is guaranteed by device characterization, but is not production tested.
6.42
5