Datasheet > 71342LA20PF8

71342LA20PF8

更新时间： 2023-06-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
14页	124K
描述
TQFP-64, Reel

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71342LA20PF8 数据手册

IDT71342SA/LA

High-Speed 4K x 8 Dual-Port Static RAM with Semaphore

Industrial and Commercial Temperature Ranges

Description

TheIDT71342is ahigh-speed4Kx8Dual-PortStaticRAMwithfull time. An automatic power down feature, controlled by CE and SEM,

on-chip hardware support of semaphore signalling between the two permitstheon-chipcircuitryofeachporttoenteraverylowstandbypower

ports.

The IDT71342 provides two independent ports with separate

mode (both CE and SEM HIGH).

Fabricated using IDT’s CMOS high-performance technology, this

control, address, and I/O pins that permit independent, asynchronous device typically operates on only 700mW of power. Low-power (LA)

access for reads or writes to any location in memory. To assist in versions offer battery backup data retention capability, with each port

arbitrating between ports, a fully independent semaphore logic block typicallyconsuming200µWfroma2Vbattery.Thedeviceispackaged

is provided. This block contains unassigned flags which can be in either a 64-pin TQFP or a 52-pin PLCC.

accessedbyeitherside;however,onlyonesidecancontroltheflagatany

Pin Configurations^(1,2,3)

INDEX

52 51 50 49 48 47

A1L

OER

IDT71342J

J52-1⁽⁴⁾

A6L

A7L

A8L

A9L

52-Pin PLCC

Top View⁽⁵⁾

I/O0L

I/O1L

I/O2L

I/O3L

N/C

I/O7R

21 22 23 24 25 26 27 28 29 30 31 32 33

2721 drw 02

INDEX

OER

A0L

A1L

A2L

A3L

A4L

A5L

A6L

71342PF

PN64-1⁽⁴⁾

64-Pin TQFP

Top View⁽⁵⁾

N/C

I/O0L

I/O1L

I/O2L

N/C

I/O7R

I/O6R

NOTES:

1. All Vcc pins must be connected to power supply.

2. All GND pins must be connected to ground supply.

3. J52 package body is approximately .79 in x .79 in x .17 in.

PN64 package body is approximately 14mm x 14mm x 1.4mm.

4. This package code is used to reference the package diagram.

5. This text does not indicate orientation of the actual part-marking.

2721 drw 03

6.42

123 4 5 6 7...14

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