Datasheet > 70V7519S166BFGI8

70V7519S166BFGI8

更新时间： 2022-12-29 21:38:42

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
22页	756K
描述
HIGH-SPEED 3.3V 256K x 36 SYNCHRONOUS BANK-SWITCHABLE DUAL-PORT STATIC RAM

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70V7519S166BFGI8 数据手册

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IDT70V7519S

High-Speed 256K x 36 Synchronous Bank-Switchable Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

Timing Waveform of Pipelined Read with Address Counter Advance⁽¹⁾

CYC2

tCH2

tCL2

CLK

tSA

tHA

ADDRESS

SAD tHAD

ADS

tSAD tHAD

CNTEN

SCN tHCN

tCD2

Qn + 2⁽²⁾

Qx - 1⁽²⁾

Qn + 3

Qn + 1

DATAOUT

tDC

READ

WITH

COUNTER

HOLD

READ WITH COUNTER

EXTERNAL

ADDRESS

5618 drw 16

TimingWaveformof Flow-ThroughReadwithAddressCounterAdvance⁽¹⁾

CYC1

tCH1

tCL1

CLK

tSA

tHA

ADDRESS

tSAD tHAD

tSAD

tHAD

ADS

tSCN

tHCN

CNTEN

tCD1

Qn + 3⁽²⁾

Qx⁽²⁾

Qn + 4

Qn + 1

Qn + 2

DATAOUT

tDC

READ

EXTERNAL

ADDRESS

READ WITH COUNTER

COUNTER

HOLD

WITH

COUNTER

5618 drw 17

NOTES:

1. CE0, OE, BEn = VIL; CE1, R/W, and REPEAT = VIH.

2. If there is no address change via ADS = VIL (loading a new address) or CNTEN = VIL (advancing the address), i.e. ADS = VIH and CNTEN = VIH, then

the data output remains constant for subsequent clocks.

6.42

1...14 15 161718 19 20...22

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