IDT70V261S/L
High-Speed 16K x 16 Dual-Port Static RAM with Interrupt
Industrial and Commercial Temperature Ranges
Description
address,andI/Opinsthatpermitindependent,asynchronousaccessfor
reads or writes to any location in memory. An automatic power down
featurecontrolledbyCEpermitstheon-chipcircuitryofeachporttoenter
a very low standby power mode.
Fabricated using CMOS high-performance technology, these de-
vices typically operate on only 300mW of power.
TheIDT70V261isahigh-speed16Kx16Dual-PortStaticRAM.The
IDT70V261isdesignedtobeusedasastand-alone256K-bitDual-Port
RAMorasacombinationMASTER/SLAVEDual-PortRAMfor32-bit-or-
more word systems. Using the IDT MASTER/SLAVE Dual-Port RAM
approach in 32-bit or wider memory system applications results in full-
speed,error-freeoperationwithouttheneedforadditionaldiscretelogic.
This device provides two independent ports with separate control,
The IDT70V261 is packaged in a 100-pin Thin Quad Flatpack.
Pin Configurations(1,2,3)
12/11/01
Index
86
76
85 84 83 82 81 80 79 78 77
100 99 98 97 96 95 94 93 92 91 90 89 88 87
1
2
3
4
5
6
7
8
9
N/C
N/C
N/C
75
N/C
N/C
N/C
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
A6L
A5L
A4L
A3L
A2L
A1L
A0L
N/C
I/O10L
I/O11L
I/O12L
I/O13L
GND
I/O14L
I/O15L
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
IDT70V261PF
INTL
(4)
PN100-1
BUSY
GND
M/S
BUSY
INTR
L
VCC
GND
I/O0R
I/O1R
I/O2R
100-Pin TQFP
(5)
Top View
R
A
A
A
A
A
A
0R
VCC
1R
2R
3R
4R
5R
I/O3R
I/O4R
I/O5R
I/O6R
N/C
N/C
N/C
N/C
N/C
N/C
N/C
26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50
,
3040 drw 02
NOTES:
Pin Names
1. All VCC pins must be connected to power supply.
2. All GND pins must be connected to ground supply.
Left Port
Right Port
Names
3. Package body is approximately 14mm x 14mm x 1.4mm.
4. This package code is used to reference the package diagram.
5. This text does not indicate orientation of the actual part-marking.
Chip Enable
CE
R/W
OE
L
CE
R/W
OE
R
L
R
Read/Write Enable
Output Enable
Address
L
R
A
0L - A13L
I/O0L - I/O15L
SEM
UB
LB
BUSY
A
0R - A13R
I/O0R - I/O15R
Data Input/Output
Semaphore Enable
Upper Byte Select
Lower Byte Select
Busy Flag
L
SEM
UB
LB
BUSY
M/S
R
L
R
L
R
L
R
Master or Slave Select
Power
V
CC
GND
Ground
3040 tbl 01
6.242