Datasheet > 6N137M

6N137M

更新时间： 2024-02-18 11:47:27

品牌	Logo	应用领域
安森美 - ONSEMI		输出元件光电
页数	文件大小	规格书
18页	640K
描述
高速 10MB/s 逻辑门极光耦合器

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6N137M 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	HTS代码：	8541.40.80.00
Factory Lead Time：	10 weeks	风险等级：	5.72
光电设备类型：	LOGIC IC OUTPUT OPTOCOUPLER	Base Number Matches：	1

6N137M 数据手册

Single−Channel: 6N137M, HCPL2601M, HCPL2611M Dual−Channel: HCPL2630M,

HCPL2631M

ELECTRICAL CHARACTERISTICS (continued)

Symbol

Parameter

Test Conditions

Device

Min

Typ

Max

Unit

SWITCHING CHARACTERISTICS (V = 5 V, I = 7.5 mA, T = −40°C to +85°C unless otherwise specified)

|CM |

Common Mode Transient

Immunity at Logic Low

= 50 V

, R = 350 W,

6N137M,

−

10,000

−

V/ms

PEAK

T = 25°C (Note 11) (Figure 25)

HCPL2630M

HCPL2601M,

HCPL2631M

5000

= 400 V

, R = 350 W,

HCPL2611M

10,000 15,000

PEAK

T = 25°C (Note 11) (Figure 25)

ISOLATION CHARACTERISTICS (T = 25°C, unless otherwise noted)

ISO

Withstand Insulation Test

Voltage

Relative Humidity ≤ 50%,

≤ 10 mA, t = 1 min, f = 50 Hz

All

5,000

−

VAC

RMS

I−O

(Note 12) (Note 13)

Resistance (Input to Output)

= 500 V (Note 12)

All

−

I−O

Capacitance (Input to

Output)

f = 1 MHz, V

= 0 V (Note 12)

I−O

Input−Output Insulation

Leakage Current

Relative Humidity ≤ 45%,

V = 3000 V , t = 5 s (Note 12)

I−I

All

−

1.0

I−O

Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product

performance may not be indicated by the Electrical Characteristics if operated under different conditions.

4. Enable Input – No pull up resistor required as the device has an internal pull up resistor.

5. t

– Propagation delay is measured from the 3.75 mA level on the LOW to HIGH transition of the input current pulse to the 1.5 V level on

PHL

the HIGH to LOW transition of the output voltage pulse.

6. t – Propagation delay is measured from the 3.75 mA level on the HIGH to LOW transition of the input current pulse to the 1.5 V level on

PLH

the LOW to HIGH transition of the output voltage pulse.

7. t – Rise time is measured from the 10% to the 90% levels on the LOW to HIGH transition of the output pulse.

8. t – Fall time is measured from the 90% to the 10% levels on the HIGH to LOW transition of the output pulse.

EHL

9. t

– Enable input propagation delay is measured from the 1.5 V level on the LOW to HIGH transition of the input voltage pulse to the 1.5 V

level on the HIGH to LOW transition of the output voltage pulse.

10.t – Enable input propagation delay is measured from the 1.5 V level on the HIGH to LOW transition of the input voltage pulse to the 1.5 V

ELH

level on the LOW to HIGH transition of the output voltage pulse.

11. Common mode transient immunity in logic high level is the maximum tolerable (positive) dV /dt on the leading edge of the common mode

pulse signal, V , to assure that the output will remain in a logic high state (i.e., V > 2.0 V). Common mode transient immunity in logic low

level is the maximum tolerable (negative) dV /dt on the trailing edge of the common mode pulse signal, V , to assure that the output will

remain in a logic low state (i.e., V < 0.8 V).

12.Device is considered a two terminal device: pins 1, 2, 3 and 4 are shorted together and pins 5, 6, 7 and 8 are shorted together.

13.5000 VAC for 1 minute duration is equivalent to 6000 VAC for 1 second duration

RMS

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1...3 4 567 8 9...18

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