Datasheet > 62C1024L

62C1024L

更新时间： 2024-09-24 22:19:31

品牌	Logo	应用领域
美国芯成 - ISSI		/
页数	文件大小	规格书
11页	66K
描述
128K x 8 LOW POWER CMOS STATIC RAM

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62C1024L 数据手册

IS62C1024L

ISSI

128K x 8 LOW POWER CMOS STATIC RAM

DECEMBER 2003

FEATURES

DESCRIPTION

The ISSI IS62C1024L is a low power,131,072-word by 8-bit

CMOS static RAM. It is fabricated using ISSI's high-performance

CMOS technology. This highly reliable process coupled

with innovative circuit design techniques, yields higher

performance and low power consumption devices.

• High-speed access time: 35, 70 ns

• Low active power: 450 mW (typical)

• Low standby power: 150 µW (typical) CMOS

standby

• Output Enable (OE) and two Chip Enable

(CE1 and CE2) inputs for ease in applications

When CE1 is HIGH or CE2 is LOW (deselected), the

device assumes a standby mode at which the power

dissipation can be reduced by using CMOS input levels.

• Fully static operation: no clock or refresh

required

Easy memory expansion is provided by using two Chip

Enable inputs, CE1 and CE2. The active LOW Write

Enable (WE) controls both writing and reading of the

memory.

• TTL compatible inputs and outputs

• Single 5V (±10%) power supply

The IS62C1024L is available in 32-pin plastic SOP and

TSOP (type 1) packages.

FUNCTIONAL BLOCK DIAGRAM

128K x 8

MEMORY ARRAY

A0-A16

DECODER

VDD

GND

I/O

DATA

COLUMN I/O

I/O0-I/O7

CIRCUIT

CE1

CONTROL

CIRCUIT

CE2

Copyright © 2003 Integrated Silicon Solution, Inc. All rights reserved. ISSI reserves the right to make changes to this specification and its products at any time without notice. ISSI assumes no liability

arisingoutoftheapplicationoruseofanyinformation, productsorservicesdescribedherein. Customersareadvisedtoobtainthelatestversionofthisdevicespecificationbeforerelyingonany

publishedinformationandbeforeplacingordersforproducts.

Integrated Silicon Solution, Inc. — 1-800-379-4774

Rev. E

11/26/03

12 3 4 5 6 7...11

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