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5V2305SPGGK PDF预览

5V2305SPGGK

更新时间: 2022-02-26 11:05:51
品牌 Logo 应用领域
艾迪悌 - IDT /
页数 文件大小 规格书
10页 126K
描述
High-Performance 1 to 5 Clock Buffer

5V2305SPGGK 数据手册

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High-Performance 1 to 5 Clock Buffer  
5V2305S  
DATASHEET  
Description  
Features  
The 5V2305S is a low skew, single input to five output, clock  
buffer. The 5V2305S has best in class additive phase Jitter of  
sub 50 fsec.  
Extremely low RMS Additive Phase Jitter: 50fs  
Low output skew: 20ps  
Packaged in 16-pin TSSOP and small 2mm x 2mm 10-pin  
DFN  
The 5V2305S also supports a synchronous glitch-free Output  
Enable function to eliminate any potential intermediate  
incorrect output clock cycles when enabling or disabling  
outputs. It comes in various packages and can operate from a  
1.8V to 3.3V supply.  
Pb (lead) free package  
Low power CMOS technology  
Operating voltages of 1.8V to 3.3V  
Extended temperature range (-40°C to +105°C)  
Block Diagram  
Control  
Logic  
OE  
Q0  
Q1  
Q2  
ICLK  
Q3  
Q4  
5V2305S AUGUST 1, 2016  
1
©2016 Integrated Device Technology, Inc.  

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