5SGXEA5H2F35I3G PDF预览

5SGXEA5H2F35I3G

更新时间: 2025-09-22 19:45:47
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英特尔 - INTEL /
页数 文件大小 规格书
24页 219K
描述
元器件封装:1152-FBGA;逻辑单元数量:490000;CLB数量:185000;IO线数量:552;最小工作电压(V):0.82V;最大工作电压(V):0.88V;最小工作温度(℃):-40°C;最大工作温度(℃):100°C(TJ);

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Stratix V Device Overview  
2020.06.15  
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Alteras 28-nm Stratix® V FPGAs include innovations such as an enhanced core architecture, integrated  
transceivers up to 28.05 gigabits per second (Gbps), and a unique array of integrated hard intellectual  
property (IP) blocks.  
With these innovations, Stratix V FPGAs deliver a new class of application-targeted devices optimized for:  
Bandwidth-centric applications and protocols, including PCI Express® (PCIe®) Gen3  
Data-intensive applications for 40G/100G and beyond  
High-performance, high-precision digital signal processing (DSP) applications  
Stratix V devices are available in four variants (GT, GX, GS, and E), each targeted for a different set of  
applications. For higher volume production, you can prototype with Stratix V FPGAs and use the low-risk,  
low-cost path to HardCopy® V ASICs.  
Related Information  
Stratix V Device Handbook: Known Issues  
Lists the planned updates to the Stratix V Device Handbook chapters.  
Stratix V Family Variants  
e Stratix V device family contains the GT, GX, GS, and E variants.  
Stratix V GT devices, with both 28.05-Gbps and 12.5-Gbps transceivers, are optimized for applications  
that require ultra-high bandwidth and performance in areas such as 40G/100G/400G optical communica‐  
tions systems and optical test systems. 28.05-Gbps and 12.5-Gbps transceivers are also known as GT and  
GX channels, respectively.  
Stratix V GX devices offer up to 66 integrated transceivers with 14.1-Gbps data rate capability. ese  
transceivers also support backplane and optical interface applications. ese devices are optimized for  
high-performance, high-bandwidth applications such as 40G/100G optical transport, packet processing,  
and traffic management found in wireline, military communications, and network test equipment markets.  
Stratix V GS devices have an abundance of variable precision DSP blocks, supporting up to 3,926 18x18 or  
1,963 27x27 multipliers. In addition, Stratix V GS devices offer integrated transceivers with 14.1-Gbps data  
rate capability. ese transceivers also support backplane and optical interface applications. ese devices  
are optimized for transceiver-based DSP-centric applications found in wireline, military, broadcast, and  
high-performance computing markets.  
Stratix V E devices offer the highest logic density within the Stratix V family with nearly one million logic  
elements (LEs) in the largest device. ese devices are optimized for applications such as ASIC and system  
emulation, diagnostic imaging, and instrumentation.  
Intel Corporation. All rights reserved. Intel, the Intel logo, Altera, Arria, Cyclone, Enpirion, MAX, Nios, Quartus and Stratix words and logos are trademarks of  
Intel Corporation or its subsidiaries in the U.S. and/or other countries. Intel warrants performance of its FPGA and semiconductor products to current  
specifications in accordance with Intel's standard warranty, but reserves the right to make changes to any products and services at any time without notice.  
Intel assumes no responsibility or liability arising out of the application or use of any information, product, or service described herein except as expressly  
agreed to in writing by Intel. Intel customers are advised to obtain the latest version of device specifications before relying on any published information  
and before placing orders for products or services.  
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*Other names and brands may be claimed as the property of others.  
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