Datasheet > 5CEFA2M13C7N

5CEFA2M13C7N

更新时间： 2024-01-16 01:42:19

品牌	Logo	应用领域
英特尔 - INTEL		栅可编程逻辑
页数	文件大小	规格书
95页	1359K
描述
Field Programmable Gate Array, 25000-Cell, CMOS, PBGA383, ROHS COMPLIANT, MBGA-383

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5CEFA2M13C7N 技术参数

是否Rohs认证：	符合	生命周期：	Active
包装说明：	TFBGA, BGA383,25X25,20	Reach Compliance Code：	compliant
HTS代码：	8542.39.00.01	风险等级：	5.59
Is Samacsys：	N	JESD-30 代码：	S-PBGA-B383
长度：	13 mm	输入次数：	223
逻辑单元数量：	25000	输出次数：	223
端子数量：	383	最高工作温度：	85 °C
最低工作温度：		封装主体材料：	PLASTIC/EPOXY
封装代码：	TFBGA	封装等效代码：	BGA383,25X25,20
封装形状：	SQUARE	封装形式：	GRID ARRAY, THIN PROFILE, FINE PITCH
峰值回流温度（摄氏度）：	NOT SPECIFIED	电源：	1.1,1.2/3.3,2.5 V
可编程逻辑类型：	FIELD PROGRAMMABLE GATE ARRAY	认证状态：	Not Qualified
座面最大高度：	1.1 mm	子类别：	Field Programmable Gate Arrays
最大供电电压：	1.13 V	最小供电电压：	1.07 V
标称供电电压：	1.1 V	表面贴装：	YES
技术：	CMOS	温度等级：	OTHER
端子形式：	BALL	端子节距：	0.5 mm
端子位置：	BOTTOM	处于峰值回流温度下的最长时间：	NOT SPECIFIED
宽度：	13 mm	Base Number Matches：	1

5CEFA2M13C7N 数据手册

CV-51002

2015.12.04

Document Revision History

Date

Version

Changes

• Removed “Slave select pulse width (Texas Instruments SSP mode)” parameter from the following tables:

• SPI Master Timing Requirements for Cyclone V Devices

• SPI Slave Timing Requirements for Cyclone V Devices

• Added descriptions to USB Timing Characteristics section in HPS Specifications: PHYs that support LPM

mode may not function properly with the USB controller due to a timing issue. It is recommended that

designers use the MicroChip USB3300 PHY device that has been proven to be successful on the develop‐

ment board.

• Added HPS JTAG timing specifications.

• Updated the configuration .rbf size (bits) for Cyclone V devices.

• Added a note to Uncompressed .rbf Sizes for Cyclone V Devices table: The recommended EPCQ serial

configuration devices are able to store more than one image.

July 2014

3.9

• Added a note in Table 3, Table 4, and Table 5: The power supply value describes the budget for the DC

(static) power supply tolerance and does not include the dynamic tolerance requirements. Refer to the PDN

tool for the additional budget for the dynamic tolerance requirements.

• Added a note in Table 19: Differential inputs are powered by V_CCPDwhich requires 2.5 V.

• Updated "Minimum differential eye opening at the receiver serial input pins" specification in Table 20.

• Updated h2f_user2_clk specification for –C6, –C7, and –I7 speed grades in Table 34.

• Updated description in “HPS PLL Specifications” section.

• Updated VCO range maximum specification in Table 35.

• Updated T_dand T_hspecifications in Table 41.

• Added T_hspecification in Table 43 and Figure 10.

• Updated a note in Figure 17, Figure 18, and Figure 20 as follows: Do not leave DCLK floating after configu‐

ration. DCLK is ignored after configuration is complete. It can toggle high or low if required.

• Removed “Remote update only in AS mode” specification in Table 54.

• Added DCLK device initialization clock source specification in Table 56.

• Added description in “Configuration Files” section: The IOCSR .rbf size is specifically for the Configuration

via Protocol (CvP) feature.

• Added "Recommended EPCQ Serial Configuration Device" values in Table 57.

• Removed f_{MAX_RU_CLK}specification in Table 59.

Cyclone V Device Datasheet

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与5CEFA2M13C7N相关器件

型号	品牌	获取价格	描述	数据表
5CEFA2M13I7N	INTEL	获取价格	Field Programmable Gate Array, 25000-Cell, CMOS, PBGA383, ROHS COMPLIANT, MBGA-383
5CEFA2M13I7N	ALTERA	获取价格	Field Programmable Gate Array, PBGA383, ROHS COMPLIANT, MBGA-383
5CEFA4F23C8N	INTEL	获取价格	Field Programmable Gate Array, 48000-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484
5CEFA4M13C8N	INTEL	获取价格	Field Programmable Gate Array, 49000-Cell, CMOS, PBGA383, ROHS COMPLIANT, MBGA-383
5CEFA4M13I7N	INTEL	获取价格	Field Programmable Gate Array, 49000-Cell, CMOS, PBGA383, ROHS COMPLIANT, MBGA-383
5CEFA4U19A7N	INTEL	获取价格	Field Programmable Gate Array, 49000-Cell, CMOS, PBGA484, ROHS COMPLIANT, UBGA-484
5CEFA5F23C8N	INTEL	获取价格	Field Programmable Gate Array, 76500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484
5CEFA5F23I7N	ALTERA	获取价格	Field Programmable Gate Array, 76500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484
5CEFA5F23I7N	INTEL	获取价格	Field Programmable Gate Array, 76500-Cell, CMOS, PBGA484, ROHS COMPLIANT, FBGA-484
5CEFA5U19C8N	INTEL	获取价格	Field Programmable Gate Array, 76500-Cell, CMOS, PBGA484, ROHS COMPLIANT, UBGA-484

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