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5AGXMA7H4F35I3N PDF预览

5AGXMA7H4F35I3N

更新时间: 2024-02-05 17:56:01
品牌 Logo 应用领域
英特尔 - INTEL 时钟LTE可编程逻辑
页数 文件大小 规格书
122页 2542K
描述
Field Programmable Gate Array, 670MHz, PBGA1152, ROHS COMPLIANT, FBGA-1152

5AGXMA7H4F35I3N 技术参数

是否无铅: 不含铅是否Rohs认证: 符合
生命周期:Transferred零件包装代码:BGA
包装说明:ROHS COMPLIANT, FBGA-1152针数:1152
Reach Compliance Code:compliant风险等级:5.27
最大时钟频率:670 MHzJESD-30 代码:S-PBGA-B1152
JESD-609代码:e1长度:35 mm
端子数量:1152封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装形状:SQUARE
封装形式:GRID ARRAY峰值回流温度(摄氏度):NOT SPECIFIED
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY座面最大高度:2.7 mm
最大供电电压:1.18 V最小供电电压:1.12 V
标称供电电压:1.15 V表面贴装:YES
端子面层:TIN SILVER COPPER端子形式:BALL
端子节距:1 mm端子位置:BOTTOM
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:35 mm

5AGXMA7H4F35I3N 数据手册

 浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第1页浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第3页浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第4页浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第5页浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第6页浏览型号5AGXMA7H4F35I3N的Datasheet PDF文件第7页 
Page 2  
Electrical Characteristics  
Absolute Maximum Ratings  
This section defines the maximum operating conditions for Arria V devices. The  
values are based on experiments conducted with the devices and theoretical modeling  
of breakdown and damage mechanisms.  
The functional operation of the device is not implied for these conditions.  
c
Conditions outside the range listed in Table 1 may cause permanent damage to the  
device. Additionally, device operation at the absolute maximum ratings for extended  
periods of time may have adverse effects on the device.  
Table 1. Absolute Maximum Ratings for Arria V Devices  
Symbol Description  
VCC  
Minimum  
Maximum  
Unit  
Core voltage power supply  
–0.50  
1.43  
V
Periphery circuitry, PCIe® hard IP block, and transceiver physical  
coding sublayer (PCS) power supply  
VCCP  
–0.50  
1.43  
V
VCCPGM  
VCC_AUX  
VCCBAT  
Configuration pins power supply  
Auxiliary supply  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–0.50  
–25  
3.90  
3.25  
3.90  
3.90  
3.90  
1.80  
3.25  
3.25  
1.80  
1.50  
1.50  
1.50  
3.80  
1.43  
3.90  
3.90  
3.25  
3.25  
40  
V
V
Battery back-up power supply for design security volatile key register  
I/O pre-driver power supply  
V
VCCPD  
V
VCCIO  
I/O power supply  
V
VCCD_FPLL  
VCCA_FPLL  
VCCA_GXB  
VCCH_GXB  
VCCR_GXB  
VCCT_GXB  
VCCL_GXB  
VI  
Phase-locked loop (PLL) digital power supply  
PLL analog power supply  
V
V
Transceiver high voltage power  
Transmitter output buffer power  
Receiver power  
V
V
V
Transmitter power  
V
Transceiver clock network power  
DC input voltage  
V
V
VCC_HPS  
VCCPD_HPS  
VCCIO_HPS  
HPS core voltage and periphery circuitry power supply  
HPS I/O pre-driver power supply  
HPS I/O power supply  
V
V
V
VCCRSTCLK_HPS HPS reset and clock input pins power supply  
V
VCCPLL_HPS  
IOUT  
HPS PLL analog power supply  
DC output current per pin  
V
mA  
°C  
°C  
TJ  
Operating junction temperature  
Storage temperature (No bias)  
–55  
125  
TSTG  
–65  
150  
Arria V GX, GT, SX, and ST Device Datasheet  
December 2013 Altera Corporation  

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