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5962R9858001QXC PDF预览

5962R9858001QXC

更新时间: 2024-02-16 19:00:19
品牌 Logo 应用领域
艾法斯 - AEROFLEX /
页数 文件大小 规格书
14页 103K
描述
RadHard Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver

5962R9858001QXC 技术参数

生命周期:Transferred包装说明:DFP, FL48,.4,25
Reach Compliance Code:unknown风险等级:5.77
控制类型:COMMON CONTROL计数方向:BIDIRECTIONAL
JESD-30 代码:R-XDFP-F48最大I(ol):0.008 A
位数:8功能数量:2
端子数量:48最高工作温度:125 °C
最低工作温度:-55 °C输出特性:3-STATE
输出极性:TRUE封装主体材料:CERAMIC
封装代码:DFP封装等效代码:FL48,.4,25
封装形状:RECTANGULAR封装形式:FLATPACK
电源:3.3,5 VProp。Delay @ Nom-Sup:20 ns
认证状态:Not Qualified筛选级别:38535V;38534K;883S
子类别:Bus Driver/Transceivers表面贴装:YES
技术:CMOS温度等级:MILITARY
端子形式:FLAT端子节距:0.635 mm
端子位置:DUAL总剂量:100k Rad(Si) V
翻译:3V & 5VBase Number Matches:1

5962R9858001QXC 数据手册

 浏览型号5962R9858001QXC的Datasheet PDF文件第4页浏览型号5962R9858001QXC的Datasheet PDF文件第5页浏览型号5962R9858001QXC的Datasheet PDF文件第6页浏览型号5962R9858001QXC的Datasheet PDF文件第8页浏览型号5962R9858001QXC的Datasheet PDF文件第9页浏览型号5962R9858001QXC的Datasheet PDF文件第10页 
AC ELECTRICAL CHARACTERISTICS1 (Port B = 5 Volt, Port A = 3.3 Volt)  
(V  
= 5V ±10%; V  
= 3.00V to 3.6V, -55°C < T < +125°C) (T = -55°C to +125°C for "C" screening and -40°C to +125°C for "W" screening  
DD1  
DD2  
C
C
SYMBOL  
PARAMETER  
MINIMUM  
MAXIMUM  
UNIT  
tPLH  
Propagation delay Data to Bus  
Propagation delay Data to Bus  
Output enable time OEx to Bus  
Output enable time OEx to Bus  
1
20  
ns  
tPHL  
tPZL  
tPZH  
tPLZ  
tPHZ  
1
1
1
1
1
1
20  
18  
18  
20  
20  
18  
ns  
ns  
ns  
ns  
ns  
ns  
Output disable time OEx to Bus high impedance  
Output disable time OEx to Bus high impedance  
Output enable time DIRx to Bus  
2
tPZL  
2
Output enable time DIRx to Bus  
1
1
1
18  
20  
20  
ns  
ns  
ns  
tPZH  
2
Output disable time DIRx to Bus high impedance  
Output disable time DIRx to Bus high impedance  
tPLZ  
2
tPHZ  
Notes:  
1. All specifications valid for radiation dose £ 1E5 rad(Si) per MIL-STD-883, Method 1019.  
2. DIRx to bus times are guaranteed by design, but not tested. OEx to bus times are tested.  
Propagation Delay  
VDD  
VDD/2  
0V  
Input  
tPLH  
tPHL  
VOH  
VDD/2  
Output  
VOL  
Enable Disable Times  
VDD  
VDD/2  
0V  
Control Input  
tPZL  
tPLZ  
VDD/2  
5V Output  
Normally Low  
5V Output  
.2VDD + .2V  
tPHZ  
VDD/2-0.2  
VDD/2+0.2  
.2VDD  
tPZH  
.8VDD  
VDD/2  
Normally High  
.8VDD - .2V  
tPLZ  
tPZL  
VDD/2  
.2VDD  
.7VDD  
VDD/2  
3.3V Output  
Normally Low  
3.3V Output  
VDD /2-0.2  
VDD/2+0.2  
.2VDD + .2V  
tPHZ  
tPZH  
Normally High  
.7VDD - .2V  
7

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