UT54ACS164245S
RadHard Schmitt CMOS 16-bit Bidirectional MultiPurpose Transceiver
Datasheet
April, 2002
LOGIC SYMBOL
FEATURES
OE1 (48)
G1
· Voltage translation
(24)
OE2 (25)
2EN1 (BA)
2EN2 (AB)
G2
DIR2
1B1
- 5V bus to 3.3V bus
- 3.3V bus to 5V bus
(1)
DIR1
1A1
1EN1 (BA)
1EN2 (AB)
· Cold sparing
(2)
(47)
- 1MW minimum input impedance power-off
11
· 0.6mm Commercial RadHardTM CMOS
- Total dose: 100K rad(Si)
- Single Event Latchup immune
· High speed, low power consumption
12
(46)
(44)
(3)
(5)
(6)
(8)
1A2
1A3
1B2
1B3
1B4
1B5
(43)
(41)
(40)
(38)
1A4
1A5
· Schmitt trigger inputs to filter noisy signals
· Available QML Q or V processes
· Standard Microcircuit Drawing 5962-98580
(9)
(11)
(12)
(13)
1A6
1A7
1A8
2A1
1B6
1B7
(37)
(36)
1B8
2B1
· Package:
21
- 48-lead flatpack, 25 mil pitch (.390 x .640)
22
(35)
(33)
(32)
(30)
(29)
(27)
(26)
(14)
(16)
(17)
2B2
2B3
2B4
2B5
2A2
2A3
DESCRIPTION
The 16-bit wide UT54ACS164245S MultiPurpose transceiver
2A4
2A5
is built using UTMC’s Commercial RadHardTM epitaxial
CMOS technology and is ideal for space applications. This high
speed, low power UT54ACS164245S transceiver is designed to
perform multiple functions including: asynchronous two-way
communication, signal buffering, voltage translation, and cold
sparing. With VDD equal to zero volts, the UT54ACS164245S
(19)
(20)
(22)
(23)
2B6
2B7
2A6
2A7
2A8
2B8
PIN DESCRIPTION
outputs and inputs present a minimum impedance of 1MW mak-
ing it ideal for "cold spare" applications. Balanced outputs and
low "on" output impedance make the UT54ACS164245S well
suited for driving high capacitance loads and low impedance
backplanes. The UT54ACS164245S enables system designers
to interface 3.3 volt CMOS compatible components with 5 volt
CMOS components. For voltage translation, the A port inter-
faces with the 3.3 volt bus; the B port interfaces with the 5 volt
bus. The direction control (DIRx) controls the direction of data
flow. The output enable (OEx) overrides the direction control
and disables both ports. These signals can be driven from either
port A or B. The direction and output enable controls operate
these devices as either two independent 8-bit transceivers or one
16-bit transceiver.
Pin Names
Description
OEx
DIRx
xAx
Output Enable Input (Active Low)
Direction Control Inputs
Side A Inputs or 3-State Outputs (3.3V Port)
Side B Inputs or 3-State Outputs (5V Port)
xBx
FUNCTION TABLE
ENABLE
OEx
DIRECTION
DIRx
OPERATION
B Data To A Bus
A Data To B Bus
Isolation
L
L
L
H
X
H
1