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5962R9570801TJC PDF预览

5962R9570801TJC

更新时间： 2024-02-04 06:38:39
品牌 Logo 应用领域
英特矽尔 - INTERSIL 可编程只读存储器
页数 文件大小 规格书
3页 98K
描述
Radiation Hardened 2K x 8 CMOS PROM

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中文翻译

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5962R9570801TJC 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP, FL24,.4针数：24
Reach Compliance Code：unknownECCN代码：EAR99
HTS代码：8542.32.00.71风险等级：5.69
Is Samacsys：N最长访问时间：100 ns
JESD-30 代码：R-CDFP-F24JESD-609代码：e4
内存密度：16384 bit内存集成电路类型：OTP ROM
内存宽度：8功能数量：1
端子数量：24字数：2048 words
字数代码：2000工作模式：ASYNCHRONOUS
最高工作温度：125 °C最低工作温度：-55 °C
组织：2KX8封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装等效代码：FL24,.4
封装形状：RECTANGULAR封装形式：FLATPACK
并行/串行：PARALLEL电源：5 V
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class V
座面最大高度：2.92 mm最大待机电流：0.0002 A
子类别：OTP ROMs最大压摆率：0.025 mA
标称供电电压 (Vsup)：5 V表面贴装：YES
技术：CMOS温度等级：MILITARY
端子面层：GOLD端子形式：FLAT
端子节距：1.27 mm端子位置：DUAL
总剂量：100k Rad(Si) V宽度：9.905 mm
Base Number Matches：1

5962R9570801TJC 数据手册

 浏览型号5962R9570801TJC的Datasheet PDF文件第2页浏览型号5962R9570801TJC的Datasheet PDF文件第3页 
HS-6617RH-T  
Data Sheet  
July 1999  
File Number 4608.1  
Radiation Hardened 2K x 8 CMOS PROM  
Features  
Intersil’s Satellite Applications FlowTM (SAF) devices are fully  
tested and guaranteed to 100kRAD total dose. These QML  
Class T devices are processed to a standard flow intended  
to meet the cost and shorter lead-time needs of large  
volume satellite manufacturers, while maintaining a high  
level of reliability.  
• QML Class T, Per MIL-PRF-38535  
• Radiation Performance  
5
- Gamma Dose (γ) 1 x 10 RAD(Si)  
2
- SEU LET 16MeV/mg/cm  
2
- SEL LET 100MeV/mg/cm  
• Field Programmable Nicrome Fuse Links  
• Low Standby Power 1.1mW Max  
• Low Operating Power 137.5mW/MHz Max  
• Fast Access Time 100ns Max  
The Intersil HS-6617RH-T is a radiation hardened 16k  
CMOS PROM, organized in a 2K word by 8-bit format. The  
chip is manufactured using a radiation hardened CMOS  
process, and is designed to be functionally equivalent to the  
HM-6617. Synchronous circuit design techniques combine  
with CMOS processing to give this device high speed  
performance with very low power dissipation.  
• TTL Compatible Inputs/Outputs  
• Synchronous Operation  
On chip address latches are provided, allowing easy  
interfacing with recent generation microprocessors that use  
multiplexed address/data bus structure, such as the  
HS-80C86RH. The output enable control (G) simplifies  
microprocessor system interfacing by allowing output data  
bus control, in addition to, the chip enable control.  
Synchronous operation of the HS-6617RH-T is ideal for high  
speed pipe-lined architecture systems and also in  
synchronous logic replacement functions.  
• On Chip Address Latches, Three-State Outputs  
Pinouts  
HS1-6617RH-T (SBDIP), CDIP2-T24  
TOP VIEW  
A7  
A6  
A5  
A4  
A3  
A2  
A1  
A0  
Q0  
1
2
3
4
5
6
7
8
9
24  
V
DD  
23 A8  
22 A9  
21  
20  
P
Specifications  
G
Specifications for Rad Hard QML devices are controlled by  
the Defense Supply Center in Columbus (DSCC). The SMD  
numbers listed below must be used when ordering.  
19 A10  
18  
E
17 Q7  
16 Q6  
15 Q5  
14 Q4  
13 Q3  
Detailed Electrical Specifications for the HS-6617RH-T  
are contained in SMD 5962-95708. A “hot-link” is provided  
from our website for downloading.  
Q1 10  
Q2 11  
www.intersil.com/spacedefense/newsafclasst.asp  
GND 12  
Intersil’s Quality Management Plan (QM Plan), listing all  
Class T screening operations, is also available on our  
website.  
HS9-6617RH-T (FLATPACK), CDFP4-F24  
TOP VIEW  
www.intersil.com/quality/manuals.asp  
1
24  
V
A7  
A6  
DD  
Ordering Information  
A8  
A9  
P †  
G
2
23  
22  
21  
20  
19  
18  
17  
16  
15  
14  
13  
A5  
3
TEMP.  
A4  
4
ORDERING  
NUMBER  
RANGE  
( C)  
o
A3  
5
PART NUMBER  
HS1-6617RH-T  
A10  
E
A2  
6
5962R9570801TJC  
HS1-6617RH/Proto  
5962R9570801TXC  
HS9-6617RH/Proto  
-55 to 125  
-55 to 125  
-55 to 125  
-55 to 125  
A1  
7
Q7  
Q6  
Q5  
Q4  
Q3  
A0  
8
HS1-6617RH/Proto  
HS9-6617RH-T  
Q0  
Q1  
Q2  
GND  
9
10  
11  
HS9-6617RH/Proto  
12  
NOTE: Minimum order quantity for -T is 150 units through  
distribution, or 450 units direct.  
† P must be hardwired at all times to V , except during  
programming.  
DD  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1
Satellite Applications Flow™ (SAF) is a trademark of Intersil Corporation.  
123

中文翻译

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5962R9570801TJC 替代型号

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