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5962R9571401QRC PDF预览

5962R9571401QRC

更新时间： 2024-01-18 17:51:56
品牌 Logo 应用领域
英特矽尔 - INTERSIL 总线收发器逻辑集成电路
页数 文件大小 规格书
6页 48K
描述
Radiation Hardened 8-Bit Bus Transceiver

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5962R9571401QRC 技术参数

生命周期：Obsolete零件包装代码：DFP
包装说明：DFP,针数：20
Reach Compliance Code：unknownHTS代码：8542.39.00.01
风险等级：5.84系列：CMOS
JESD-609代码：e4逻辑集成电路类型：BUS TRANSCEIVER
位数：8功能数量：1
端口数量：2最高工作温度：125 °C
最低工作温度：-55 °C输出特性：3-STATE
输出极性：TRUE封装主体材料：CERAMIC, METAL-SEALED COFIRED
封装代码：DFP封装形式：FLATPACK
认证状态：Not Qualified筛选级别：MIL-PRF-38535 Class V
座面最大高度：2.92 mm最大供电电压 (Vsup)：5.25 V
最小供电电压 (Vsup)：4.75 V标称供电电压 (Vsup)：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子面层：GOLD
端子形式：FLAT端子节距：1.27 mm
端子位置：DUAL总剂量：100k Rad(Si) V
宽度：6.92 mmBase Number Matches：1

5962R9571401QRC 数据手册

 浏览型号5962R9571401QRC的Datasheet PDF文件第2页浏览型号5962R9571401QRC的Datasheet PDF文件第3页浏览型号5962R9571401QRC的Datasheet PDF文件第4页浏览型号5962R9571401QRC的Datasheet PDF文件第5页浏览型号5962R9571401QRC的Datasheet PDF文件第6页 
HS-82C08RH  
Radiation Hardened  
8-Bit Bus Transceiver  
February 1996  
Features  
Functional Diagram  
• Devices QML Qualified in Accordance With  
MIL-PRF-38535  
• Detailed Electrical and Screening Requirements are  
Contained in SMD# 5962-95714 and Intersil’ QM Plan  
A0  
B0  
• Radiation Hardened  
- Total Dose 1 x 105 RAD (Si)  
- Latch-Up Immune EPI-CMOS > 1 x 1012 RAD (Si)/s  
A1  
A2  
A3  
A4  
A5  
A6  
A7  
B1  
B2  
B3  
B4  
B5  
B6  
B7  
PORT  
A
PORT  
B
• Bidirectional Three-State Input/Outputs  
• Low Propagation Delay Time  
• Low Power Consumption  
• Single Power Supply +5V  
T/R  
• Electrically Equivalent to Sandia SA2997  
• Military Temperature Range -55oC to +125oC  
OE  
Description  
TRUTH TABLE  
The Intersil HS-82C08RH is a radiation-hardened octal bus  
transceiver with three-state outputs. It is manufactured using  
a self-aligned, junction isolated CMOS process and is  
designed for use with the HS-80C08RH radiation-hardened  
microprocessor. The HS-82C08RH allows asynchronous  
two-way communication between data buses. The direction  
of data flow is determined by the logic level on the transmit/  
receive (T/R) input. A logic high on the T/R input specifies  
data flow from Port A to Port B of the device. Conversely, a  
logic low on the T/R input specifies data flow from Port B to  
Port A. The Output Enable input disables both ports by  
placing them in the high impedance state.  
INPUTS  
OPERATION  
OUTPUT  
ENABLE  
TRANSMIT  
/RECEIVE  
PORT A PORT B  
0
0
1
X
Out  
In  
In  
0
Out  
1
High Z  
High Z  
X = Don’t Care  
The HS-82C08RH is ideally suited for a wide variety of  
buffering applications in radiation-hardened microcomputer  
systems.  
Ordering Information  
PART NUMBER  
5962R9571401QRC  
5962R9571401QXC  
5962R9571401VRC  
5962R9571401VXC  
HS1-82C08RH/SAMPLE  
HS9-82C08RH/SAMPLE  
TEMPERATURE RANGE  
SCREENING LEVEL  
MIL-PRF-38535 Level Q  
MIL-PRF-38535 Level Q  
MIL-PRF-38535 Level V  
MIL-PRF-38535 Level V  
SAMPLE  
PACKAGE  
o
o
-55 C to +125 C  
20 Lead SBDIP  
o
o
-55 C to +125 C  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
o
-55 C to +125 C  
o
o
-55 C to +125 C  
20 Lead Ceramic Flatpack  
20 Lead SBDIP  
o
+25 C  
o
+25 C  
SAMPLE  
20 Lead Ceramic Flatpack  
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.  
Spec Number 518057  
File Number 3040.2  
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999  
1
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