Datasheet > 存储 > FIFO> 5962D8956809VNC

5962D8956809VNC

更新时间： 2024-02-05 15:18:02

品牌	Logo	应用领域
爱特美尔 - ATMEL		存储先进先出芯片
页数	文件大小	规格书
20页	1848K
描述
Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO

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技术参数
数据手册

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5962D8956809VNC 技术参数

生命周期：	Transferred	零件包装代码：	DIP
包装说明：	DIP,	针数：	28
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.32.00.71	风险等级：	5.17
Is Samacsys：	N	最长访问时间：	30 ns
周期时间：	40 ns	JESD-30 代码：	R-CDIP-T28
长度：	27.94 mm	内存密度：	36864 bit
内存宽度：	9	功能数量：	1
端子数量：	28	字数：	4096 words
字数代码：	4000	工作模式：	ASYNCHRONOUS
最高工作温度：	125 °C	最低工作温度：	-55 °C
组织：	4KX9	可输出：	NO
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装代码：	DIP
封装形状：	RECTANGULAR	封装形式：	IN-LINE
并行/串行：	PARALLEL	认证状态：	Qualified
筛选级别：	MIL-PRF-38535 Class V	座面最大高度：	3.94 mm
最大供电电压 (Vsup)：	5.5 V	最小供电电压 (Vsup)：	4.5 V
标称供电电压 (Vsup)：	5 V	表面贴装：	NO
技术：	CMOS	温度等级：	MILITARY
端子形式：	THROUGH-HOLE	端子节距：	2.54 mm
端子位置：	DUAL	总剂量：	10k Rad(Si) V
宽度：	7.62 mm	Base Number Matches：	1

5962D8956809VNC 数据手册

Write Enable (W)

A write cycle is initiated on the falling edge of this input if the Full Flag (FF) is not set.

Data set-up and hold times must be maintained in the rise time of the leading edge of

the Write Enable (W). Data is stored sequentially in the Ram array, regardless of any

current read operation.

Once half the memory is filled, and during the falling edge of the next write operation,

the Half-Full Flag (HF) will be set to low and remain in this state until the difference

between the write and read pointers is less than or equal to half of the total available

memory in the device. The Half-Full Flag (HF) is then reset by the rising edge of the

read operation.

To prevent data overflow, the Full Flag (FF) will go low, inhibiting further write opera-

tions. On completion of a valid read operation, the Full Flag (FF) will go high after TRFF,

allowing a valid write to begin. When the FIFO stack is full, the internal write pointer is

blocked from W, so that external changes to W will have no effect on the full FIFO stack.

Read Enable (R)

A read cycle is initiated on the falling edge of the Read Enable (R) provided that the

Empty Flag (EF) is not set. The data is accessed on a first in/first out basis, not with

standing any current write operations. After Read Enable (R) goes high, the Data Out-

puts (Q0 - Q8) will return to a high impedance state until the next Read operation. When

all the data in the FIFO stack has been read, the Empty Flag (EF) will go low, allowing

the “final” read cycle, but inhibiting further read operations whilst the data outputs

remain in a high impedance state. Once a valid write operation has been completed, the

Empty Flag (EF) will go high after tWEF and a valid read may then be initiated. When

the FIFO stack is empty, the internal read pointer is blocked from R, so that external

changes to R will have no effect on the empty FIFO stack.

First Load/Retransmit

(FL/RT)

This is a dual-purpose input. In the Depth Expansion Mode, this pin is connected to

ground to indicate that it is the first loaded (see Operating Modes). In the Single Device

Mode, this pin acts as the retransmit input. The Single Device Mode is initiated by con-

necting the Expansion In (XI) to ground.

The M67204H can be made to retransmit data when the Retransmit Enable Control (RT)

input is pulsed low. A retransmit operation will set the internal read point to the first loca-

tion and will not affect the write pointer. Read Enable (R) and Write Enable (W) must be

in the high state during retransmit. The retransmit feature is intended for use when a

number of writes equals to or less than the depth of the FIFO has occured since the last

RS cycle. The retransmit feature is not compatible with the Depth Expansion Mode and

will affect the Half-Full Flag (HF), in accordance with the relative locations of the read

and write pointers.

Expansion In (XI)

Full Flag (FF)

This input is a dual-purpose pin. Expansion In (XI) is connected to GND to indicate an

operation in the single device mode. Expansion In (XI) is connected to Expansion Out

(XO) of the previous device in the Depth Expansion or Daisy Chain modes.

The Full Flag (FF) will go low, inhibiting further write operations when the write pointer is

one location less than the read pointer, indicating that the device is full. If the read

pointer is not moved after Reset (RS), the Full Flag (FF) will go low after 4096 writes.

Empty Flag (EF)

The Empty Flag (EF) will go low, inhibiting further read operations when the read pointer

is equal to the write pointer, indicating that the device is empty.

M67204H

4141J–AERO–04/07

1 2 345 6 7...20

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与5962D8956809VNC相关器件

型号	品牌	描述	获取价格	数据表
5962D8956809VTC	MICROCHIP	FIFO, 4KX9, 30ns, Asynchronous, CMOS, CDIP28	获取价格
5962D8956809VTC	ATMEL	Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO	获取价格
5962D8956809VTX	ATMEL	FIFO, 4KX9, 30ns, Asynchronous, CMOS, CDIP28, 0.300 INCH, SIDE BRAZED, CERAMIC, DIP-28	获取价格
5962D8956810VNC	ATMEL	Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO	获取价格
5962D8956810VNC	MICROCHIP	FIFO, 4KX9, 15ns, Asynchronous, CMOS	获取价格
5962D8956810VTC	ATMEL	Rad. Tolerant High Speed 4 Kb x 9 Parallel FIFO	获取价格

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