Datasheet > 5962-JM38510/55501BZXC

5962-JM38510/55501BZXC

更新时间： 2022-11-24 21:17:35

品牌	Logo	应用领域
其他 - ETC		/
页数	文件大小	规格书
52页	1271K
描述
RTI Remote Terminal Interface

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5962-JM38510/55501BZXC 数据手册

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[0]

[1]

Channel B Enabled. A logic one indicates that Channel B is available for

both reception and transmission.

Channel A Enabled. A logic one indicates that Channel A is available for

both reception and transmission.

Terminal Flag Enabled. A logic one indicates that the Bus Controller has

not issued an Inhibit Terminal Flag mode code. A logic zero indicates that

the Bus Controller, via the above mode code, is overriding the host sys-

tem’s ability to set the Terminal Flag bit of the status word.

[0]

Busy. A logic one indicates the Busy bit is set. This bit is reset when the

SystemBusy bit in the Control Register is reset.

Self-Test. A logic one indicates that the RTI is in the self-test mode. This

bit isreset when the self-test is terminated.

TA Parity Error. A logic one indicates the wrong Terminal Address parity;

it causes the biphase inputs to be disabled and a message error condition.

This bit is reset by reloading the terminal address latch with correct parity.

[0]

Message Error. A logic one indicates that a message error has occurred

since the last System Register read. This bit is not reset until the System

Valid Message. A logic one indicates that a valid message has been

received since the last System Register read. This bit is not reset until the

System Register has been examined.

Terminal Active. A logic one indicates the device is executing a transmit or

receive operation. The state of this bit is the logical NAND of the external

XMIT and RCV pins.

SYSTEM REGISTER (READ ONLY)

TERM

ACTV

VAL MESS TAPA SELF- BUSY

TFEN CH A

CH B

CHNL

A/B

MC/

MCSA MCSA MCSA MCSA MCSA

MESS

ERR

TEST

[0]

[1]

[0]

[1]

[0]

LSB

[0]

MSB

[ ] deﬁnes reset state

Figure 5. System Registers

RTI-6

1...3 4 567 8 9...52

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