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5962-9952301QZC

更新时间： 2024-01-06 03:46:55
品牌 Logo 应用领域
赛普拉斯 - CYPRESS 可编程逻辑器件输入元件时钟
页数 文件大小 规格书
64页 1733K
描述
5V, 3.3V, ISRTM High-Performance CPLDs

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5962-9952301QZC 技术参数

生命周期：Active零件包装代码：QFP
包装说明：QFP,针数：160
Reach Compliance Code：compliantECCN代码：3A001.A.2.C
HTS代码：8542.39.00.01风险等级：5.76
最大时钟频率：62.5 MHzJESD-30 代码：S-CQFP-G160
长度：28 mm专用输入次数：1
I/O 线路数量：133端子数量：160
最高工作温度：125 °C最低工作温度：-55 °C
组织：1 DEDICATED INPUTS, 133 I/O输出函数：MACROCELL
封装主体材料：CERAMIC, METAL-SEALED COFIRED封装代码：QFP
封装形状：SQUARE封装形式：FLATPACK
可编程逻辑类型：EE PLD传播延迟：15 ns
认证状态：Qualified筛选级别：MIL-PRF-38535 Class Q
座面最大高度：2.79 mm最大供电电压：5.5 V
最小供电电压：4.5 V标称供电电压：5 V
表面贴装：YES技术：CMOS
温度等级：MILITARY端子形式：GULL WING
端子节距：0.65 mm端子位置：QUAD
宽度：28 mmBase Number Matches：1

5962-9952301QZC 数据手册

 浏览型号5962-9952301QZC的Datasheet PDF文件第1页浏览型号5962-9952301QZC的Datasheet PDF文件第2页浏览型号5962-9952301QZC的Datasheet PDF文件第3页浏览型号5962-9952301QZC的Datasheet PDF文件第5页浏览型号5962-9952301QZC的Datasheet PDF文件第6页浏览型号5962-9952301QZC的Datasheet PDF文件第7页 
Ultra37000 CPLD Family  
3
2
2
0−16  
I/O  
CELL  
0
MACRO-  
CELL  
0
PRODUCT  
TERMS  
7
MACRO-  
CELL  
1
0−16  
to cells  
2, 4, 6 8, 10, 12  
PRODUCT  
TERMS  
FROM  
PIM  
36  
80  
72 x 87  
PRODUCT TERM  
ARRAY  
PRODUCT  
TERM  
ALLOCATOR  
MACRO-  
CELL  
14  
I/O  
CELL  
14  
0−16  
PRODUCT  
TERMS  
MACRO-  
CELL  
15  
0−16  
TO  
PIM  
PRODUCT  
TERMS  
16  
8
Figure 1. Logic Block with 50% Buried Macrocells  
Low-Power Option  
variable fashion. The software automatically takes advantage  
of this capability—the user does not have to intervene.  
Each logic block can operate in high-speed mode for critical  
path performance, or in low-power mode for power conser-  
vation. The logic block mode is set by the user on a logic block  
by logic block basis.  
Note that neither product term sharing nor product term  
steering have any effect on the speed of the product. All  
worst-case steering and sharing configurations have been  
incorporated in the timing specifications for the Ultra37000  
devices.  
Product Term Allocator  
Through the product term allocator, software automatically  
distributes product terms among the 16 macrocells in the logic  
block as needed. A total of 80 product terms are available from  
the local product term array. The product term allocator  
provides two important capabilities without affecting perfor-  
mance: product term steering and product term sharing.  
Ultra37000 Macrocell  
Within each logic block there are 16 macrocells. Macrocells  
can either be I/O Macrocells, which include an I/O Cell which  
is associated with an I/O pin, or buried Macrocells, which do  
not connect to an I/O. The combination of I/O Macrocells and  
buried Macrocells varies from device to device.  
Product Term Steering  
Buried Macrocell  
Product term steering is the process of assigning product  
terms to macrocells as needed. For example, if one macrocell  
requires ten product terms while another needs just three, the  
product term allocator will “steer” ten product terms to one  
macrocell and three to the other. On Ultra37000 devices,  
product terms are steered on an individual basis. Any number  
between 0 and 16 product terms can be steered to any  
macrocell. Note that 0 product terms is useful in cases where  
a particular macrocell is unused or used as an input register.  
Figure 2 displays the architecture of buried macrocells. The  
buried macrocell features a register that can be configured as  
combinatorial, a D flip-flop, a T flip-flop, or a level-triggered  
latch.  
The register can be asynchronously set or asynchronously  
reset at the logic block level with the separate set and reset  
product terms. Each of these product terms features program-  
mable polarity. This allows the registers to be set or reset  
based on an AND expression or an OR expression.  
Product Term Sharing  
Clocking of the register is very flexible. Four global  
synchronous clocks and a product term clock are available to  
clock the register. Furthermore, each clock features program-  
mable polarity so that registers can be triggered on falling as  
well as rising edges (see the Clocking section). Clock polarity  
is chosen at the logic block level.  
Product term sharing is the process of using the same product  
term among multiple macrocells. For example, if more than  
one output has one or more product terms in its equation that  
are common to other outputs, those product terms are only  
programmed once. The Ultra37000 product term allocator  
allows sharing across groups of four output macrocells in a  
Document #: 38-03007 Rev. *D  
Page 4 of 64  
1234567...64

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