Datasheet > 电源电路 > 开关式稳压器或控制器> 5962-8768102VEA

5962-8768102VEA

更新时间： 2024-01-03 14:13:25

品牌	Logo	应用领域
德州仪器 - TI		稳压器开关式稳压器或控制器电源电路开关式控制器
页数	文件大小	规格书
15页	302K
描述
High Speed PWM Controller

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5962-8768102VEA 技术参数

生命周期：	Obsolete	包装说明：	,
Reach Compliance Code：	unknown	ECCN代码：	EAR99
HTS代码：	8542.39.00.01	风险等级：	5.84
Is Samacsys：	N	模拟集成电路 - 其他类型：	SWITCHING CONTROLLER
控制模式：	CURRENT-MODE	控制技术：	PULSE WIDTH MODULATION
最大输入电压：	20 V	最小输入电压：	8.8 V
JESD-30 代码：	S-CQCC-N20	功能数量：	1
端子数量：	20	最高工作温度：	125 °C
最低工作温度：	-55 °C	最大输出电流：	2.2 A
封装主体材料：	CERAMIC, METAL-SEALED COFIRED	封装形状：	SQUARE
封装形式：	CHIP CARRIER	认证状态：	Not Qualified
表面贴装：	YES	切换器配置：	PUSH-PULL
最大切换频率：	1000 kHz	技术：	BIPOLAR
温度等级：	MILITARY	端子形式：	NO LEAD
端子位置：	QUAD	Base Number Matches：	1

5962-8768102VEA 数据手册

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www.ti.com

SLUS334C − AUGUST 1995 − REVISED AUGUST 2004

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during

storage or handling to prevent electrostatic damage to the MOS gates.

DESCRIPTION (CONTINUED)

Functional improvements have also been implemented in this family. The UC3825 shutdown comparator is now a

high-speed overcurrent comparator with a threshold of 1.2 V. The overcurrent comparator sets a latch that ensures full

discharge of the soft-start capacitor before allowing a restart. While the fault latch is set, the outputs are in the low state.

In the event of continuous faults, the soft-start capacitor is fully charged before discharge to insure that the fault frequency

does not exceed the designed soft start period. The UC3825 CLOCK pin has become CLK/LEB. This pin combines the

functions of clock output and leading edge blanking adjustment and has been buffered for easier interfacing.

The UC3825A and UC3825B have dual alternating outputs and the same pin configuration of the UC3825. The UC3823A

and UC3823B outputs operate in phase with duty cycles from zero to less than 100%. The pin configuration of the UC3823A

and UC3823B is the same as the UC3823 except pin 11 is now an output pin instead of the reference pin to the current

limit comparator. “A” version parts have UVLO thresholds identical to the original UC3823 and UC3825. The “B” versions

have UVLO thresholds of 16 V and 10 V, intended for ease of use in off-line applications.

Consult the application note, The UC3823A,B and UC3825A,B Enhanced Generation of PWM Controllers, (SLUA125) for

detailed technical and applications information.

ORDERING INFORMATION

UVLO

9.2 V / 8.4 V

16 V / 10 V

MAXIMUM

DUTY CYCLE

(1)

SOIC−16

(1)

PLCC−20

(1)

PLCC−20

PDIP−16

(N)

SOIC−16

(DW)

PDIP−16

(N)

(DW)

(Q)

< 100%

< 50%

< 100%

< 50%

UC2823ADW

UC2825ADW

UC3823ADW

UC3825ADW

UC2823AN

UC2825AN

UC3823AN

UC3825AN

UC2823AQ

UC2825AQ

UC3823AQ

UC3825AQ

UC2823BDW

UC2825BDW

UC3823BDW

UC3825BDW

UC2823BN

UC2825BN

UC3823BN

UC3825BN

−

−40°C to 85°C

−0°C to 70°C

−

UC3825BQ

(1)

The DW and Q packages are also available taped and reeled. Add TR suffix to the device type (i.e., UC2823ADWR). To order quantities of 1000

devices per reel for the Q package and 2000 devices per reel for the DW package.

UVLO

9.2 V / 8.4 V

MAXIMUM

DUTY CYCLE

CDIP−16

(J)

LCCC−20

(L)

< 100%

< 50%

UC1823AJ, UC1823AJ883B, UC1823AJQMLV

UC1825AJ, UC1825AJ883B, UC1825AJQMLV

UC1823AL, UC1823AL883B

−55°C to 125°C

UC1825AL, UC1825AL883B, UC1825ALQMLV

PIN ASSIGNMENTS

Q OR L PACKAGES

(TOP VIEW)

DW, J, OR N PACKAGES

(TOP VIEW)

INV

EAOUT

CLK/LEB

VREF

VCC

OUTB

20 19

OUTB

EAOUT

CLK/LEB

PGND

11 OUTA

RAMP

GND

ILIM

14 OUTA

9 10 11 12 13

NC = no connection

123 4 5 6 7...15

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