591FA310M000DG PDF预览

591FA310M000DG

更新时间: 2025-09-21 18:56:27
品牌 Logo 应用领域
思佳讯 - SKYWORKS /
页数 文件大小 规格书
16页 516K
描述
频率(MHz):310 MHz;最小工作温度(℃):-40°C;最大工作温度(℃):85°C;安装类型:表面贴装型;封装:6-SMD,无引线;

591FA310M000DG 数据手册

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Si590/591  
1 ps MAX JITTER CRYSTAL OSCILLATOR (XO)  
(10 MHZ TO 810 MHZ)  
Features  
Available with any-frequency output  
frequencies from 10 to 810 MHz  
Available CMOS, LVPECL,  
LVDS, and CML outputs  
3.3, 2.5, and 1.8 V supply options  
Industry Standard 5x7 and  
3.2x5 mm packages  
Pb-free/RoHS-compliant  
–40 to +85 ºC operating  
temperature range  
®
3rd generation DSPLL with superior  
jitter performance: 1 ps max jitter  
Better frequency stability than SAW-  
based oscillators  
Internal fundamental mode crystal  
ensures high reliability  
Ordering Information:  
Applications  
See page 8.  
SONET/SDH (OC-3/12/48)  
Networking  
SD/HD SDI/3G SDI video  
Test and measurement  
Storage  
FPGA/ASIC clock generation  
Pin Assignments:  
See page 7.  
Description  
®
(Top View)  
The Si590/591 XO utilizes Skyworks Solutions’ advanced DSPLL circuitry  
to provide a low jitter clock at high frequencies. The Si590/591 supports any  
frequency from 10 to 810 MHz. Unlike a traditional XO, where a unique  
crystal is required for each output frequency, the Si590/591 uses one fixed  
crystal to provide a wide range of output frequencies. This IC based  
approach allows the crystal resonator to provide exceptional frequency  
stability and reliability. In addition, DSPLL clock synthesis provides superior  
supply noise rejection, simplifying the task of generating low jitter clocks in  
noisy environments typically found in communication systems. The  
Si590/591 IC based XO is factory configurable for a wide variety of user  
specifications including frequency, supply voltage, output format, and  
stability. Specific configurations are factory programmed at time of shipment,  
thereby eliminating long lead times associated with custom oscillators.  
VDD  
1
2
3
6
5
4
NC  
OE  
CLK–  
CLK+  
GND  
Si590 (LVDS/LVPECL/CML)  
VDD  
1
2
3
6
5
4
OE  
NC  
Functional Block Diagram  
NC  
VDD  
CLK– CLK+  
GND  
CLK  
Si590 (CMOS)  
17 k*  
Any-rate  
10–810 MHz  
DSPLL®  
Clock  
Synthesis  
Fixed  
Frequency  
XO  
VDD  
1
2
3
6
5
4
OE  
NC  
OE  
CLK–  
CLK+  
17 k*  
GND  
Si591 (LVDS/LVPECL/CML)  
*Note: Output Enable High/Low Options Available – See Ordering Information  
GND  
Skyworks Solutions, Inc. • Phone [781] 376-3000 • Fax [781] 376-3100 • sales@skyworksinc.com • www.skyworksinc.com  
Rev. 1.2 • Skyworks Proprietary Information • Products and Product Information are Subject to Change Without Notice • March 4, 2022  

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