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562BAA002496BBG PDF预览

562BAA002496BBG

更新时间: 2024-02-19 06:50:23
品牌 Logo 应用领域
芯科 - SILICON 机械输出元件振荡器
页数 文件大小 规格书
17页 949K
描述
LVDS Output Clock Oscillator,

562BAA002496BBG 技术参数

是否Rohs认证: 符合生命周期:Active
包装说明:CLCC, 8 PINReach Compliance Code:unknown
风险等级:5.68其他特性:TRI-STATE; ENABLE/DISABLE FUNCTION; COMPLEMENTARY OUTPUT
最长下降时间:0.35 ns频率调整-机械:NO
频率稳定性:20%JESD-609代码:e4
安装特点:SURFACE MOUNT端子数量:6
标称工作频率:2496 MHz最高工作温度:85 °C
最低工作温度:-40 °C振荡器类型:LVDS
输出负载:100 OHM封装主体材料:METAL
物理尺寸:7mm x 5mm x 1.33mm最长上升时间:0.35 ns
最大压摆率:157 mA最大供电电压:3.63 V
最小供电电压:2.97 V标称供电电压:3.3 V
表面贴装:YES最大对称度:55/45 %
端子面层:Gold (Au) - with Nickel (Ni) barrierBase Number Matches:1

562BAA002496BBG 数据手册

 浏览型号562BAA002496BBG的Datasheet PDF文件第2页浏览型号562BAA002496BBG的Datasheet PDF文件第3页浏览型号562BAA002496BBG的Datasheet PDF文件第4页浏览型号562BAA002496BBG的Datasheet PDF文件第5页浏览型号562BAA002496BBG的Datasheet PDF文件第6页浏览型号562BAA002496BBG的Datasheet PDF文件第7页 
Ultra Series Crystal Oscillator  
Si562 Data Sheet  
Ultra Low Jitter Quad Any-Frequency XO (90 fs), 0.2 to 3000  
MHz  
KEY FEATURES  
• Available with any four selectable  
frequencies from 200 kHz to 3000 MHz  
The Si562 Ultra Seriesoscillator utilizes Silicon Laboratories’ advanced 4th gener-  
ation DSPLL® technology to provide an ultra-low jitter, low phase noise clock at four  
selectable frequencies. The device is factory-programmed to provide any four se-  
lectable frequencies from 0.2 to 3000 MHz with <1 ppb resolution and maintains ex-  
ceptionally low jitter for both integer and fractional frequencies across its operating  
range. The Si562 offers excellent reliability and frequency stability as well as guar-  
anteed aging performance. On-chip power supply filtering provides industry-leading  
power supply noise rejection, simplifying the task of generating low jitter clocks in  
noisy systems that use switched-mode power supplies. Offered in industry-standard  
3.2x5 mm and 5x7 mm footprints, the Si562 has a dramatically simplified supply  
chain that enables Silicon Labs to ship custom frequency samples 1-2 weeks after  
receipt of order. Unlike a traditional XO, where a different crystal is required for each  
output frequency, the Si562 uses one simple crystal and a DSPLL IC-based ap-  
proach to provide the desired output frequencies. This process also guarantees  
100% electrical testing of every device. The Si562 is factory-configurable for a wide  
variety of user specifications, including frequency, output format, and OE pin loca-  
tion/polarity. Specific configurations are factory-programmed at time of shipment,  
eliminating the long lead times associated with custom oscillators.  
• Ultra low jitter: 90 fs RMS typical  
(12 kHz – 20 MHz)  
• Excellent PSRR and supply noise  
immunity: –80 dBc Typ  
• 20 ppm temp stability (-40 to 85 °C)  
• 3.3 V, 2.5 V and 1.8 V V supply  
DD  
operation from the same part number  
• LVPECL, LVDS, CML, HCSL, CMOS, and  
Dual CMOS output options  
• 3.2x5, 5x7 mm package footprints  
• Samples available with 1-2 week lead times  
APPLICATIONS  
• 100G/200G/400G OTN, coherent optics  
• 10G/25G/40G/100G Ethernet  
Pin Assignments  
• 3G-SDI/12G-SDI/24G-SDI broadcast video  
FS1  
• Servers, switches, storage, NICs, search  
acceleration  
7
1
2
3
6
5
4
VDD  
CLK-  
CLK+  
OE/NC  
NC/OE  
GND  
• Test and measurement  
• Clock and data recovery  
• FPGA/ASIC clocking  
8
FS0  
(Top View)  
Pin #  
Descriptions  
Selectable via ordering option  
Fixed  
Frequency  
Crystal  
Frequency  
Flexible  
DSPLL  
1, 2  
Low  
Noise  
Driver  
OE = Output enable; NC = No Connect  
DCO  
Digital  
Phase  
Detector  
Digital  
Loop  
Filter  
3
4
5
6
7
8
GND = Ground  
OSC  
Phase Error  
Cancellation  
Flexible  
Formats,  
1.8V – 3.3V  
Operation  
CLK+ = Clock output  
Phase Error  
Fractional  
Divider  
CLK- = Complementary clock output. Not used for CMOS.  
VDD = Power supply  
NVM  
Control  
Power Supply Regulation  
FS1 = Frequency Select 1  
OE, Frequency Select  
(Pin Control)  
Built-in Power Supply  
Noise Rejection  
FS0 = Frequency Select 0  
silabs.com | Building a more connected world.  
Rev. 1.0  

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