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54LS367 PDF预览

54LS367

更新时间: 2024-02-11 20:13:30
品牌 Logo 应用领域
美国国家半导体 - NSC /
页数 文件大小 规格书
6页 140K
描述
Hex TRI-STATE Buffers

54LS367 技术参数

是否Rohs认证: 不符合生命周期:Obsolete
包装说明:DFP, FL16,.3Reach Compliance Code:unknown
风险等级:5.92控制类型:ENABLE LOW
JESD-30 代码:R-XDFP-F16JESD-609代码:e0
逻辑集成电路类型:BUS DRIVER位数:6
功能数量:2端子数量:16
最高工作温度:125 °C最低工作温度:-55 °C
输出特性:3-STATE输出极性:TRUE
封装主体材料:CERAMIC封装代码:DFP
封装等效代码:FL16,.3封装形状:RECTANGULAR
封装形式:FLATPACK电源:5 V
认证状态:Not Qualified筛选级别:MIL-STD-883 Class C
子类别:Bus Driver/Transceivers标称供电电压 (Vsup):5 V
表面贴装:YES技术:TTL
温度等级:MILITARY端子面层:Tin/Lead (Sn/Pb)
端子形式:FLAT端子节距:1.27 mm
端子位置:DUAL

54LS367 数据手册

 浏览型号54LS367的Datasheet PDF文件第2页浏览型号54LS367的Datasheet PDF文件第3页浏览型号54LS367的Datasheet PDF文件第4页浏览型号54LS367的Datasheet PDF文件第5页浏览型号54LS367的Datasheet PDF文件第6页 
May 1989  
54LS367A/DM54LS367A/DM74LS367A  
Hex TRI-STATE Buffers  
É
General Description  
This device contains six independent gates each of which  
performs a non-inverting buffer function. The outputs have  
the TRI-STATE feature. When enabled, the outputs exhibit  
the low impedance characteristics of a standard LS output  
with additional drive capability to permit the driving of bus  
lines without external resistors. When disabled, both the  
output transistors are turned off presenting a high-imped-  
ance state to the bus line. Thus the output will act neither as  
a significant load nor as a driver. To minimize the possibility  
that two outputs will attempt to take a common bus to oppo-  
site logic levels, the disable time is shorter than the enable  
time of the outputs.  
Features  
Y
Alternate military/aerospace device (54LS367A) is  
available. Contact a National Semiconductor sales of-  
fice/distributor for specifications.  
Connection Diagram  
Dual-In-Line Package  
TL/F/6429–1  
Order Number 54LS367ADMQB, 54LS367AFMQB, 54LS367ALMQB, DM54LS367AJ,  
DM54LS367AW, DM74LS367AM or DM74LS367AN  
See NS Package Number E20A, J16A, M16A, N16E or W16A  
Function Table  
e
Y
A
Inputs  
Output  
Y
A
G
L
H
X
L
L
L
H
H
Hi-Z  
e
e
e
H
L
High Logic Level  
Low Logic Level  
X
Either Low or High Logic Level  
e
Hi-Z  
TRI-STATE (Outputs are disabled)  
TRI-STATEÉ is a registered trademark of National Semiconductor Corporation.  
C
1995 National Semiconductor Corporation  
TL/F/6429  
RRD-B30M105/Printed in U. S. A.  

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