Datasheet > 5429FCT2052CTQ

5429FCT2052CTQ

更新时间： 2022-12-11 16:27:48

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
8页	129K
描述
FAST CMOS OCTAL REGISTERED TRANSCEIVERS

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数据手册

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5429FCT2052CTQ 数据手册

IDT29FCT52AT/BT/CT/DT, IDT29FCT/2052AT/BT/CT, IDT29FCT53AT/BT/CT

FAST CMOS OCTAL REGISTERED TRANSCEIVERS

MILITARY AND COMMERCIAL TEMPERATURE RANGES

TEST CIRCUITS AND WAVEFORMS

TEST CIRCUITS FOR ALL OUTPUTS

SWITCH POSITION

Test

Switch

Open Drain

Disable Low

V_CC

7.0V

Closed

Enable Low

500Ω

Open

V_OUT

All Other Tests

V_IN

2629 lnk 12

Pulse

Generator

DEFINITIONS:

CL= Load capacitance: includes jig and probe capacitance.

D.U.T.

50pF

C L

RT = Termination resistance: should be equal to ZOUT of the Pulse

500Ω

Generator.

2629 drw 03

SET-UP, HOLD AND RELEASE TIMES

PULSE WIDTH

DATA

1.5V

INPUT

LOW-HIGH-LOW

PULSE

tSU

1.5V

TIMING

INPUT

ASYNCHRONOUS CONTROL

tREM

PRESET

CLEAR

ETC.

1.5V

HIGH-LOW-HIGH

PULSE

SYNCHRONOUS CONTROL

PRESET

2629 drw 05

1.5V

CLEAR

tSU

CLOCK ENABLE

ETC.

2629 drw 04

PROPAGATION DELAY

ENABLE

tPZL

DISABLE

tPLZ

1.5V

SAME PHASE

CONTROL

INPUT

1.5V

INPUT TRANSITION

tPLH

tPHL

VOH

1.5V

VOL

OUTPUT

3.5V

1.5V

3.5V

VOL

OUTPUT

NORMALLY

LOW

SWITCH

CLOSED

tPLH

0.3V

1.5V

tPZH

tPHZ

OPPOSITE PHASE

INPUT TRANSITION

VOH

OUTPUT

NORMALLY

HIGH

SWITCH

OPEN

1.5V

2629 drw 06

2629 drw 07

NOTES:

1. Diagram shown for input Control Enable-LOW and input Control Disable-

HIGH

2. Pulse Generator for All Pulses: Rate ≤ 1.0MHz; tF ≤ 2.5ns; tR ≤ 2.5ns

6.1

1...4 5 678

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