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4606X-AP1-332 PDF预览

4606X-AP1-332

更新时间： 2024-01-21 03:06:58
品牌 Logo 应用领域
伯恩斯 - BOURNS 电阻器网络
页数 文件大小 规格书
62页 1878K
描述
Resistor Networks Product Selection Guide

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中文翻译

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4606X-AP1-332 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Active包装说明：SIP, 6010
Reach Compliance Code：compliantECCN代码：EAR99
HTS代码：8533.21.00.50Factory Lead Time：14 weeks
风险等级：5.18构造：Epoxy Resin
元件功耗：0.2 W第一元件电阻：3300 Ω
JESD-609代码：e1引线长度：3.3 mm
引线间距：2.54 mm安装特点：THROUGH HOLE MOUNT
网络类型：BUSSED元件数量：5
功能数量：1端子数量：6
最高工作温度：125 °C最低工作温度：-55 °C
封装高度：8.89 mm封装长度：15.19 mm
封装形状：RECTANGULAR PACKAGE封装形式：SIP
封装宽度：2.49 mm包装方法：AMMO PACK
额定功率耗散 (P)：0.75 W额定温度：70 °C
电阻：3300 Ω电阻器类型：ARRAY/NETWORK RESISTOR
尺寸代码：6010子类别：Array/Network Resistors
表面贴装：NO技术：METAL GLAZE/THICK FILM
温度系数：100 ppm/ °C温度系数跟踪：50 ppm/ °C
端子面层：Tin/Silver/Copper (Sn/Ag/Cu)端子形状：FLAT
容差：2%工作电压：100 V
Base Number Matches：1

4606X-AP1-332 数据手册

 浏览型号4606X-AP1-332的Datasheet PDF文件第53页浏览型号4606X-AP1-332的Datasheet PDF文件第54页浏览型号4606X-AP1-332的Datasheet PDF文件第55页浏览型号4606X-AP1-332的Datasheet PDF文件第57页浏览型号4606X-AP1-332的Datasheet PDF文件第58页浏览型号4606X-AP1-332的Datasheet PDF文件第59页 
DRAM Applications  
For example, for a trace with the following characteristics:  
Application Guidelines  
e
=
=
=
=
=
=
=
5 (for G10 glass epoxy)  
30 mils  
Termination of address and control lines is typically accom-  
plished with low-valued resistors placed in series at the driver  
output. Selection of the proper resistance value is performed in  
two steps: approximation of the proper resistance using trans-  
mission line equations, and secondly, through trial and error,  
changing the resistance value to account for real world devia-  
tions such as PCB vias and bends.  
r
h
w
15 mils  
t
then, Z  
T
3 mils  
85 ohms  
o
The appropriate transmission line equations are as  
follows:  
0.15 ns/in.  
1.76 pF/in.  
d
Z
=
characteristic line impedance  
(microstrip)  
C
o
o
Z ’ = 38 ohms  
o
87  
5.98h  
T ’ = 0.35 ns/in.  
d
=
In  
ohms  
( )  
√ er + 1.41  
propagation delay of the line  
0.8w + t  
Thus on a theoretical basis, the design will require the resis-  
tance of 38 ohms to match the trace impedance of the PCB.  
However, the actual impedance will differ from this theoretical  
value due to the non-ideal characteristics of the PCB trace  
geometry (i.e., bends, curves and vias in the trace), as well as  
the manufacturing variations inherent in the components and  
materials. Therefore, a trial-and-error process must be employed  
in order to optimize the value of the damping resistor.  
The procedure involves selecting various values around the  
calculated value and observing the resulting waveforms on an  
oscilloscope. Choose the value that best balances the reduction  
in ringing/reflection and the reduction in speed: a large resis-  
tance value provides better damping, but will also add delay by  
slowing the edge rate. Typically, resistance values for memory  
damping will be in the range of 10 ohms to 50 ohms, with the  
most common values in the 20 ohm to 30 ohm range.  
Since memory damping is a type of series termination, distrib-  
uted loading along the line will not be possible. That is, the  
entire lumped load must be located at the end of the line, with  
no other loads along the signal path. This will guarantee that the  
waveform will remain undisturbed as it travels along the line. For  
related reasons, the placement of the series damping resistor  
should be as close to the driving device as possible.  
T
=
=
=
=
d
1.017 √0.475e + 0.67 ns/in.  
trace capacitance = 1000 (T /Z ) pF/in.  
r
C
o
d
d
o
C
equivalent trace capacitance associated with  
each DRAM. It takes 0.5 inch to interconnect  
one DRAM.  
=
3.5pF/0.5 in. = 7 pF/in.  
Z ’ = effective characteristic impedance, accounting  
o
for capacitive loading of the DRAMs.  
Zo  
=
√1 + C /C  
d
o
T ’ = effective propagation delay, accounting for the  
d
capacitive loading of the DRAMs  
T
=
=
T √1 + C /C  
relative dielectric constant of the PCB’s glass  
d
d
d
o
where e  
r
epoxy layer  
h
w
t
=
=
=
distance from the trace to the ground plane  
width of trace  
thickness of trace  
(Ref. MMI Systems Design Handbook, pp. 10-5 and 10-6.)  
Specifications are subject to change without notice.  
332  
1...53545556575859...62

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