Datasheet > 357LC6I001M5000

357LC6I001M5000

更新时间： 2024-02-11 00:44:47

品牌	Logo	应用领域
西迪斯 - CTS		/
页数	文件大小	规格书
4页	136K
描述
Oscillator

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技术参数
数据手册

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357LC6I001M5000 技术参数

是否Rohs认证：	符合	生命周期：	Active
Reach Compliance Code：	compliant	风险等级：	5.57
JESD-609代码：	e4	端子面层：	Gold (Au) - with Nickel (Ni) barrier
Base Number Matches：	1

357LC6I001M5000 数据手册

Model 357

7x5mm Low Cost

HCMOS/TTL Compatible VCXO

ELECTRICAL CHARACTERISTICS

PARAMETER

Maximum Supply Voltage

Maximum Control Voltage

Storage Temperature

Frequency Range

SYMBOL

V_CC

V_C

T_STG

f_O

CONDITIONS

MIN

-0.5

-55

TYP

MAX

7.0

V_CC

125

77.76

20, 25 or

UNIT

°C

MHz

1.5

Frequency Stability

(See Note 1 and Ordering Information)

∆f/f_O

± ppm

50, 80 or

100

Absolute Pull Range

(See Note 2 and Ordering Information)

APR

Operating Temperature

Commercial

Industrial

Supply Voltage

Model 357S, 357W

Model 357L, 357V

Supply Current

T_A

°C

-20

-40

± 10 %

V_CC

4.5

2.97

5.0

3.3

5.5

3.63

C_L= 15 pF

1.5 MHz to 20 MHz

20.1 MHz to 40 MHz

40.1 MHz to 60 MHz

60.1 MHz to 80 MHz

I_CC

C_L

V_C

Output Load

Control Voltage

Model 357S, 357W

Model 357L, 357V

Frequency Deviation

Linearity

_CC= 5.0V

_CC= 3.3V

0.5

0.3

2.5

1.65

135

4.5

3.0

∆f

25°C at Time of Shipment, over V_Crange

< 52 MHz

> 52 MHz

@ 50% Level

± ppm

Best Straight Line Fit

Output Duty Cycle

Output Voltage Levels

Logic '1' Level

SYM

V_OH

V_OL

90%V_CC

CMOS Load

10%V_CC

Logic '0' Level

Output Current Levels

Logic '1' Level

Logic '0' Level

Rise and Fall Time

Input Impedance

Transfer Function

Start Up Time

Modulation Roll-off

Phase Jitter

I_OH

I_OL

T_R, T_F

Z_C

T_S

CMOS Load

@ 10% - 90% Levels

3.5

-14

5.0

kOhms

kHz

Positive

Application of V_CC

@ -3dB

Bandwidth 12 kHz - 20 MHz

tjms

ps RMS

Enable Function

Enable Input Voltage

Disable Input Voltage

Enable Time

Notes:

V_IH

V_IL

T_PLZ

Pin 2 or Pin 5 Logic '1', Output Enabled

Pin 2 or Pin 5 Logic '0', Output Disabled

Pin 2 or Pin 5 Logic '1'

2.5

0.5

100

1. Inclusive of initial tolerance at time of shipment, changes in supply voltage, load, temperature and 10 year aging at an average

operating temperature of +40 °C.

2. Minimum guaranteed frequency shift from f_Oover variations in temperature, aging, power supply and load at an average operating temperature

of +40°C for 10 years.

SINGLE SIDE BAND PHASE NOISE

(typical maximum)

Frequency

Offset

Phase Noise

(dBc/Hz) *

Frequency

Offset

Phase Noise

(dBc/Hz) *

10 Hz

100 Hz

1k Hz

-60

-90

-112

10k Hz

100k Hz

≥ 100k Hz

-130

-150

* Results may vary depending on frequency.

Document No. 008-0244-0

Page 2 - 4

Rev. H

CTS Electronic Components, Inc.

171 Covington Drive

Bloomingdale, IL 60108

123 4

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