Datasheet > 3.0-VLVTTL

3.0-VLVTTL

更新时间： 2022-06-03 06:49:33

品牌	Logo	应用领域
阿尔特拉 - ALTERA		开关
页数	文件大小	规格书
34页	836K
描述
This chapterdescribes the electric characteristics, switching characteristics,and I/O timing for Cyclone III devices. A glossary is also included for your reference

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1–4

Chapter 1: Cyclone III Device Datasheet

Electrical Characteristics

Recommended Operating Conditions

This section lists the functional operation limits for AC and DC parameters for

Cyclone III devices. The steady-state voltage and current values expected from

Cyclone III devices are provided in Table 1–3. All supplies must be strictly monotonic

without plateaus.

(1), (2)

Table 1–3. Cyclone III Devices Recommended Operating Conditions

Symbol

Parameter

Conditions

Min

Typ

Max

Unit

(3)

V_CCINT

Supply voltage for internal logic

—

1.15

1.2

1.25

Supply voltage for output buffers, 3.3-V

operation

—

3.135

2.85

3.3

3.465

3.15

Supply voltage for output buffers, 3.0-V

operation

Supply voltage for output buffers, 2.5-V

operation

2.375

1.71

2.5

1.8

1.5

1.2

2.5

2.625

1.89

(3), (4)

V_CCIO

Supply voltage for output buffers, 1.8-V

operation

Supply voltage for output buffers, 1.5-V

operation

1.425

1.14

1.575

1.26

Supply voltage for output buffers, 1.2-V

operation

Supply (analog) voltage for PLL

regulator

(3)

V_CCA

2.375

2.625

(3)

V_{CCD_PLL}

Supply (digital) voltage for PLL

Input voltage

—

1.15

–0.5

1.2

—

1.25

3.6

V_I

—

V_O

Output voltage

—

V_CCIO

For commercial use

For industrial use

For extended temperature

For automotive use

Standard power-on reset

°C

–40

100

125

T_J

Operating junction temperature

50 µs

—

50 ms

3 ms

—

(5)

(POR)

t_RAMP

Power supply ramp time

(6)

Fast POR

Magnitude of DC current across

PCI-clamp diode when enabled

I_Diode

—

Notes to Table 1–3:

(1) V_CCIOfor all I/O banks must be powered up during device operation. All V_CCApins must be powered to 2.5 V (even when PLLs are not used), and

must be powered up and powered down at the same time.

(2) V_{CCD_PLL}must always be connected to V_CCINTthrough a decoupling capacitor and ferrite bead.

(3) The V_CCmust rise monotonically.

(4) All input buffers are powered by the V_CCIOsupply.

(5) POR time for Standard POR ranges between 50–200 ms. Each individual power supply should reach the recommended operating range within

50 ms.

(6) POR time for Fast POR ranges between 3–9 ms. Each individual power supply should reach the recommended operating range within 3 ms.

Cyclone III Device Handbook

Volume 2

July 2012 Altera Corporation

1 2 345 6 7...34

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