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2SK1062TE85L PDF预览

2SK1062TE85L

更新时间: 2024-11-26 13:01:15
品牌 Logo 应用领域
东芝 - TOSHIBA 开关
页数 文件大小 规格书
5页 327K
描述
TRANSISTOR 200 mA, 60 V, N-CHANNEL, Si, SMALL SIGNAL, MOSFET, TO-236, FET General Purpose Small Signal

2SK1062TE85L 技术参数

生命周期:Obsolete包装说明:SMALL OUTLINE, R-PDSO-G3
Reach Compliance Code:unknownECCN代码:EAR99
HTS代码:8541.21.00.95风险等级:5.83
Is Samacsys:N配置:SINGLE
最小漏源击穿电压:60 V最大漏极电流 (ID):0.2 A
最大漏源导通电阻:1 ΩFET 技术:METAL-OXIDE SEMICONDUCTOR
最大反馈电容 (Crss):18 pFJEDEC-95代码:TO-236
JESD-30 代码:R-PDSO-G3元件数量:1
端子数量:3工作模式:ENHANCEMENT MODE
最高工作温度:150 °C封装主体材料:PLASTIC/EPOXY
封装形状:RECTANGULAR封装形式:SMALL OUTLINE
极性/信道类型:N-CHANNEL认证状态:Not Qualified
表面贴装:YES端子形式:GULL WING
端子位置:DUAL晶体管应用:SWITCHING
晶体管元件材料:SILICONBase Number Matches:1

2SK1062TE85L 数据手册

 浏览型号2SK1062TE85L的Datasheet PDF文件第2页浏览型号2SK1062TE85L的Datasheet PDF文件第3页浏览型号2SK1062TE85L的Datasheet PDF文件第4页浏览型号2SK1062TE85L的Datasheet PDF文件第5页 
2SK1062  
TOSHIBA Field Effect Transistor Silicon N Channel MOS Type  
2SK1062  
High Speed Switching Applications  
Unit: mm  
Analog Switching Applications  
Interface Applications  
Excellent switching time: t = 14 ns (typ.)  
on  
High forward transfer admittance: |Y | = 100 ms (min)  
fs  
@I = 50 mA  
D
Low on resistance: R  
= 0.6 (typ.) @ I = 50 mA  
DS (ON) D  
Enhancement-mode  
Complementary to 2SJ168  
Absolute Maximum Ratings (Ta = 25°C)  
Characteristics  
Drain-source voltage  
Symbol  
Rating  
Unit  
V
60  
±20  
V
V
DS  
Gate-source voltage  
V
GSS  
JEDEC  
JEITA  
DC  
I
200  
D
Drain current  
mA  
Pulse  
I
800  
SC-59  
2-3F1F  
DP  
Drain power dissipation (Ta = 25°C)  
Channel temperature  
P
200  
mW  
°C  
D
ch  
stg  
TOSHIBA  
T
150  
Weight: 0.012 g (typ.)  
Storage temperature range  
T
55~150  
°C  
Note: Using continuously under heavy loads (e.g. the application of high temperature/current/voltage and the  
significant change in temperature, etc.) may cause this product to decrease in the reliability significantly even  
if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum  
ratings.  
Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook  
(“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test  
report and estimated failure rate, etc).  
Marking  
1
2007-11-01  

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