2SJ506STL-E

更新时间： 2024-01-28 08:55:06

品牌	Logo	应用领域
瑞萨 - RENESAS		晶体晶体管场效应晶体管
页数	文件大小	规格书
8页	89K
描述
Silicon P Channel MOS FET

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技术参数
数据手册

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2SJ506STL-E 技术参数

是否Rohs认证：	符合	生命周期：	Not Recommended
零件包装代码：	DPAK(S)	包装说明：	,
针数：	4	Reach Compliance Code：	compliant
风险等级：	5.7	Is Samacsys：	N
峰值回流温度（摄氏度）：	NOT SPECIFIED	处于峰值回流温度下的最长时间：	NOT SPECIFIED
Base Number Matches：	1

2SJ506STL-E 数据手册

2SJ506(L), 2SJ506(S)

Static Drain to Source on State Resistance

vs. Temperature

Forward Transfer Admittance vs.

Drain Current

100

200

160

120

Pulse Test

I_D= –10 A

V_GS= –4 V

–5 A

Tc = –25°C

–2 A

25°C

–10 A

–2 A, –5 A

75°C

–10 V

V_DS= –10 V

Pulse Test

0.5

–40

120

160

–0.1 –0.2 –0.5 –1 –2 –5 –10 –20 –50

Case Temperature Tc (°C)

Drain Current I_D(A)

Body-Drain Diode Reverse

Recovery Time

Typical Capacitance vs.

Drain to Source Voltage

5000

100

V_GS= 0

f = 1 MHz

2000

1000

500

Ciss

Coss

200

100

Crss

di / dt = 50 A / µs

_GS= 0, Ta = 25°C

–0.1 –0.2 –0.5 –1 –2

–5 –10 –20

–10

–20

–30

–40

–50

Reverse Drain Current I_DR(A)

Dynamic Input Characteristics

Drain to Source Voltage V_DS(V)

Switching Characteristics

–10

–20

–30

–40

–50

1000

500

V_GS= –10 V, V_DD= –10 V

PW = 10 µs, duty ≤ 1 %

V_DD= –5 V

–10 V

–25 V

–4

200

100

d(off)

–8

V_DD= –25 V

–10 V

–5 V

V_DS

–12

–16

–20

V_GS

d(on)

I_D= –10 A

–0.1 –0.2 –0.5 –1 –2

–5 –10 –20 –50

Gate Charge Qg (nc)

Drain Current I_D(A)

Rev.5.00 Sep 07, 2005 page 4 of 7

1 2 345 6 7 8

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