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2EDR8259H

更新时间: 2024-04-09 19:01:30
品牌 Logo 应用领域
英飞凌 - INFINEON 栅极驱动驱动器
页数 文件大小 规格书
34页 4342K
描述
EiceDRIVER? 2EDR8259H是一款加强型隔离栅极驱动器IC,用于控制SMPS中强制性安全隔离屏障。这款强大的5 A/9 A源/汇双通道栅极驱动器具有非常高的150 V/ns CMTI

2EDR8259H 数据手册

 浏览型号2EDR8259H的Datasheet PDF文件第1页浏览型号2EDR8259H的Datasheet PDF文件第2页浏览型号2EDR8259H的Datasheet PDF文件第4页浏览型号2EDR8259H的Datasheet PDF文件第5页浏览型号2EDR8259H的Datasheet PDF文件第6页浏览型号2EDR8259H的Datasheet PDF文件第7页 
EiceDRIVER2EDR8259H, 2EDRx259X, 2EDRx258X  
Dual-channel isolated gate driver ICs in 300 mil DSO package  
1 Pin configuration and description  
1
Pin configuration and description  
INA  
INB  
VDDA  
OUTA  
GNDA  
N.C.  
INA  
INB  
VDDA  
OUTA  
GNDA  
INA  
INB  
VDDA  
OUTA  
GNDA  
1
2
3
4
5
6
7
16  
15  
14  
13  
12  
11  
1
2
3
4
5
6
7
14  
13  
12  
1
2
3
4
5
6
7
14  
13  
12  
VDDI  
GNDI  
VDDI  
GNDI  
VDDI  
GNDI  
2EDRx259X  
2EDR8259H  
2EDRx258X  
DIS  
N.C.  
DIS  
EN  
STP/DTC  
VDDB  
OUTB  
GNDB  
STP/DTC  
VDDB  
OUTB  
GNDB  
STP/DTC  
VDDB  
OUTB  
GNDB  
11  
11  
N.C.  
N.C.  
N.C.  
10  
9
10  
9
10  
9
VDDI  
8
VDDI  
8
VDDI  
8
Figure 2  
Table 2  
Pin configuration (top side view)  
Pin description  
Pin  
Pin  
Symbol Description  
16-pin  
14-pin  
1
2
1
2
INA  
INB  
Input signal channel A  
Logic input with TTL compatible thresholds and internal pull-down resistor  
Input signal channel B  
Logic input with TTL compatible thresholds and internal pull-down resistor  
3,8  
4
3,8  
4
VDDI  
Input-side supply voltage (operating range: 3 V to 17 V)  
GNDI  
Ground primary-side  
5
5
DIS/ EN  
Disable input channel A and B (active high)  
If DIS is low or lef open, OUTA/OUTB are controlled by INA/INB  
DIS high causes OUTA/OUTB low  
ENABLE input channel A and B (active high)  
If EN is high, OUTA/OUTB are controlled by INA/INB  
EN low or lef open causes OUTA/OUTB low  
6
6
STP/DTC Shoot-through Protection (STP) and Dead-Time Control (DTC)  
If STP/DTC is high or lef open, OUTA and OUTB can overlap (SPT and DTC  
disabled).  
If STP/DTC is connected to GNDI with a resistance RDTC, OUTA and OUTB  
cannot overlap and a “safe dead-time” can be configured: tdt [ns] = 10  
x RDTC [kΩ]  
If STP/DTC is connected to GNDI, OUTA and OUTB cannot overlap (STP only  
enabled)  
Connecting capacitors to the DTC pin must be avoided.  
7,12,13  
7
N.C.  
No internal connection  
9
9
GNDB  
OUTB  
Ground secondary-side channel B  
10  
10  
Output secondary-side channel B  
Low-impedance output with source and sink capability  
11  
11  
VDDB  
Supply secondary-side channel B (operating range: UVLO to 20 V)  
(table continues...)  
Datasheet  
3
Rev. 1.4  
2023-10-30  

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