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27LV256-20L PDF预览

27LV256-20L

更新时间: 2024-01-31 20:32:58
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器
页数 文件大小 规格书
12页 68K
描述
256K (32K x 8) Low-Voltage CMOS EPROM

27LV256-20L 技术参数

是否无铅: 含铅是否Rohs认证: 不符合
生命周期:Obsolete零件包装代码:SOIC
包装说明:8 X 13.40 MM, PLASTIC, VSOP-28针数:28
Reach Compliance Code:not_compliantECCN代码:EAR99
HTS代码:8542.32.00.71风险等级:5.91
最长访问时间:200 ns其他特性:DATA RETENTION >200 YEARS
I/O 类型:COMMONJESD-30 代码:R-PDSO-G28
JESD-609代码:e0长度:11.8 mm
内存密度:262144 bit内存集成电路类型:OTP ROM
内存宽度:8功能数量:1
端子数量:28字数:32768 words
字数代码:32000工作模式:ASYNCHRONOUS
最高工作温度:85 °C最低工作温度:-40 °C
组织:32KX8输出特性:3-STATE
封装主体材料:PLASTIC/EPOXY封装代码:TSOP1
封装等效代码:TSSOP28,.53,22封装形状:RECTANGULAR
封装形式:SMALL OUTLINE, THIN PROFILE并行/串行:PARALLEL
峰值回流温度(摄氏度):NOT SPECIFIED电源:3.3/5 V
编程电压:13 V认证状态:Not Qualified
座面最大高度:1.2 mm最大待机电流:0.0001 A
子类别:OTP ROMs最大压摆率:0.025 mA
最大供电电压 (Vsup):5.5 V最小供电电压 (Vsup):3 V
标称供电电压 (Vsup):5 V表面贴装:YES
技术:CMOS温度等级:INDUSTRIAL
端子面层:Tin/Lead (Sn/Pb)端子形式:GULL WING
端子节距:0.55 mm端子位置:DUAL
处于峰值回流温度下的最长时间:NOT SPECIFIED宽度:8 mm
Base Number Matches:1

27LV256-20L 数据手册

 浏览型号27LV256-20L的Datasheet PDF文件第3页浏览型号27LV256-20L的Datasheet PDF文件第4页浏览型号27LV256-20L的Datasheet PDF文件第5页浏览型号27LV256-20L的Datasheet PDF文件第7页浏览型号27LV256-20L的Datasheet PDF文件第8页浏览型号27LV256-20L的Datasheet PDF文件第9页 
27LV256  
1.3  
Standby Mode  
1.6  
Verify  
The standby mode is defined when the CE pin is high  
(VIH) and a program mode is not defined. Output Dis-  
able  
After the array has been programmed it must be veri-  
fied to ensure that all the bits have been correctly pro-  
grammed. This mode is entered when all of the  
following conditions are met:  
1.4  
Output Enable  
a) VCC is at the proper level  
b) VPP is at the proper VH level  
c) the CE pin is high  
This feature eliminates bus contention in multiple bus  
microprocessor systems and the outputs go to a high  
impedance when the following condition is true:  
d) the OE line is low  
The OE pin is high and program mode is not  
defined.  
1.7  
Inhibit  
When Programming multiple devices in parallel with  
different data, only CE needs to be under separate con-  
trol to each device. By pulsing the CE line low on a par-  
ticular device, that device will be programmed, and all  
other devices with CE held high will not be pro-  
grammed with the data although address and data are  
available on their input pins.  
1.5  
Programming Mode  
The Express algorithm has been developed to improve  
on the programming throughput times in a production  
environment. Up to 10 100-microsecond pulses are  
applied until the byte is verified. No over-programming  
is required. A flowchart of the express algorithm is  
shown in Figure 1.  
1.8  
Identity Mode  
Programming takes place when:  
In this mode specific data is outputted which identifies  
the manufacturer as Microchip Technology Inc. and  
device type. This mode is entered when Pin A9 is  
taken to VH (11.5V to 12.5V). The CE and OE lines  
must be at VIL. A0 is used to access any of the two  
non-erasable bytes whose data appears on O0 through  
O7.  
a) VCC is brought to the proper voltage  
b) VPP is brought to the proper VH level  
c) the OE pin is high  
d) the CE pin is low  
Since the erased state is “1” in the array, programming  
of “0” is required. The address to be programmed is set  
via pins A0-A14 and the data to be programmed is pre-  
sented to pins O0-O7. When data and address are sta-  
ble, a low-going pulse on the CE line programs that  
location.  
Pin  
Identity  
Input  
Output  
A0 0 O O O O O O O  
H
e
x
7
6
5
4
3
2
1
0
Manufacturer  
Device Type*  
VIL  
VIH  
0
1
0
0
1
0
0
0
1
1
0
1
0
0
1
0
29  
8C  
* Code subject to change.  
DS11020F-page 6  
1996 Microchip Technology Inc.  

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