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25AA160/SN

更新时间： 2024-01-14 03:06:35
品牌 Logo 应用领域
美国微芯 - MICROCHIP 可编程只读存储器电动程控只读存储器电可擦编程只读存储器时钟光电二极管内存集成电路
页数 文件大小 规格书
22页 207K
描述
2K X 8 SPI BUS SERIAL EEPROM, PDSO8, 0.150 INCH, PLASTIC, SOIC-8

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25AA160/SN 技术参数

是否无铅： 不含铅是否Rohs认证： 符合
生命周期：Not Recommended零件包装代码：SOIC
包装说明：0.150 INCH, PLASTIC, SOIC-8针数：8
Reach Compliance Code：compliantFactory Lead Time：8 weeks
风险等级：5.18Is Samacsys：N
最大时钟频率 (fCLK)：1 MHz数据保留时间-最小值：200
耐久性：10000000 Write/Erase CyclesJESD-30 代码：R-PDSO-G8
JESD-609代码：e3内存密度：16384 bit
内存集成电路类型：EEPROM内存宽度：8
湿度敏感等级：1功能数量：1
端子数量：8字数：2048 words
字数代码：2000工作模式：SYNCHRONOUS
最高工作温度：70 °C最低工作温度：
组织：2KX8封装主体材料：PLASTIC/EPOXY
封装代码：SOP封装等效代码：SOP8,.25
封装形状：RECTANGULAR封装形式：SMALL OUTLINE
并行/串行：SERIAL峰值回流温度（摄氏度）：260
电源：2/5 V认证状态：Not Qualified
串行总线类型：SPI最大待机电流：0.000002 A
子类别：EEPROMs最大压摆率：0.005 mA
最大供电电压 (Vsup)：5.5 V最小供电电压 (Vsup)：1.8 V
标称供电电压 (Vsup)：2.5 V表面贴装：YES
技术：CMOS温度等级：COMMERCIAL
端子面层：Matte Tin (Sn)端子形式：GULL WING
端子节距：1.27 mm端子位置：DUAL
处于峰值回流温度下的最长时间：40最长写入周期时间 (tWC)：5 ms
写保护：HARDWARE/SOFTWAREBase Number Matches：1

25AA160/SN 数据手册

 浏览型号25AA160/SN的Datasheet PDF文件第3页浏览型号25AA160/SN的Datasheet PDF文件第4页浏览型号25AA160/SN的Datasheet PDF文件第5页浏览型号25AA160/SN的Datasheet PDF文件第7页浏览型号25AA160/SN的Datasheet PDF文件第8页浏览型号25AA160/SN的Datasheet PDF文件第9页 
25AA160/25LC160/25C160  
2.4  
Serial Input (SI)  
2.0  
PIN DESCRIPTIONS  
The SI pin is used to transfer data into the device. It  
receives instructions, addresses and data. Data is  
latched on the rising edge of the serial clock.  
The descriptions of the pins are listed in Table 2-1.  
TABLE 2-1:  
PIN FUNCTION TABLE  
Name PDIP  
SOIC  
Description  
2.5  
Serial Clock (SCK)  
Chip Select Input  
CS  
1
2
3
4
5
6
7
8
1
2
3
4
5
6
7
8
The SCK is used to synchronize the communication  
between a master and the 25XX160. Instructions,  
addresses, or data present on the SI pin are latched on  
the rising edge of the clock input, while data on the SO  
pin is updated after the falling edge of the clock input.  
SO  
Serial Data Output  
Write-Protect Pin  
Ground  
WP  
VSS  
SI  
Serial Data Input  
Serial Clock Input  
Hold Input  
SCK  
HOLD  
Vcc  
2.6  
Hold (HOLD)  
The HOLD pin is used to suspend transmission to the  
25XX160 while in the middle of a serial sequence  
without having to retransmit the entire sequence again.  
It must be held high any time this function is not being  
used. Once the device is selected and a serial  
sequence is underway, the HOLD pin may be pulled  
low to pause further serial communication without  
resetting the serial sequence. The HOLD pin must be  
brought low while SCK is low, otherwise the HOLD  
function will not be invoked until the next SCK high-to-  
low transition. The 25XX160 must remain selected  
during this sequence. The SI, SCK, and SO pins are in  
a high-impedance state during the time the device is  
paused and transitions on these pins will be ignored. To  
resume serial communication, HOLD must be brought  
high while the SCK pin is low, otherwise serial commu-  
nication will not resume. Lowering the HOLD line at any  
time will tri-state the SO line.  
Supply Voltage  
2.1  
Chip Select (CS)  
A low level on this pin selects the device. A high level  
deselects the device and forces it into Standby mode.  
However, a programming cycle which is already initi-  
ated or in progress will be completed, regardless of the  
CS input signal. If CS is brought high during a program  
cycle, the device will go into Standby mode as soon as  
the programming cycle is complete. When the device is  
deselected, SO goes to the high-impedance state,  
allowing multiple parts to share the same SPI bus. A  
low-to-high transition on CS after a valid write  
sequence initiates an internal write cycle. After power-  
up, a low level on CS is required prior to any sequence  
being initiated.  
2.2  
Serial Output (SO)  
The SO pin is used to transfer data out of the 25XX160.  
During a read cycle, data is shifted out on this pin after  
the falling edge of the serial clock.  
2.3  
Write-Protect (WP)  
This pin is used in conjunction with the WPEN bit in the  
Status register to prohibit writes to the nonvolatile bits  
in the Status register. When WP is low and WPEN is  
high, writing to the nonvolatile bits in the Status register  
is disabled. All other operations function normally.  
When WP is high, all functions, including writes to the  
nonvolatile bits in the Status register operate normally.  
If the WPEN bit is set, WP low during a Status register  
write sequence will disable writing to the Status  
register. If an internal write cycle has already begun,  
WP going low will have no effect on the write.  
The WP pin function is blocked when the WPEN bit in  
the Status register is low. This allows the user to install  
the 25XX160 in a system with WP pin grounded and  
still be able to write to the Status register. The WP pin  
functions will be enabled when the WPEN bit is set  
high.  
DS21231E-page 6  
1997-2012 Microchip Technology Inc.  
 
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