Datasheet > 24LC1026TI/SN

24LC1026TI/SN

更新时间： 2022-02-26 09:38:38

品牌	Logo	应用领域
美国微芯 - MICROCHIP		可编程只读存储器电动程控只读存储器电可擦编程只读存储器
页数	文件大小	规格书
30页	464K
描述
1024K I2Cï¿½ï¿½ Serial EEPROM

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24LC1026TI/SN 数据手册

24AA1026/24LC1026/24FC1026

Electrical Characteristics:

AC CHARACTERISTICS (Continued)

Industrial (I):

VCC = +1.7V to 5.5V TA = -40°C to +85°C

Automotive (E): Vcc = +2.5V to 5.5V TA = -40°C to +125°C

Param.

No.

Sym.

Characteristic

Min.

Max.

Units

Conditions

TSU:DAT Data Input Setup Time

250

100

4000

600

250

4000

600

4700

1300

—

ns 1.7V  VCC  2.5V

ns 2.5V  VCC  4.5V, E-temp

ns 2.5V  VCC  5.5V

—

ns 1.8V  VCC  2.5V (24FC1026)

ns 2.5V  VCC  5.5V (24FC1026)

ns 1.7V  VCC  2.5V

—

TSU:STO Stop Condition Setup

Time

—

ns 2.5V  VCC  4.5V, E-temp

ns 2.5V  VCC  5.5V

—

ns 1.8V  VCC  2.5V (24FC1026)

ns 2.5V  VCC  5.5V (24FC1026)

ns 1.7V  VCC  2.5V

—

TSU:WP WP Setup Time

THD:WP WP Hold Time

—

ns 2.5V  VCC  4.5V, E-temp

ns 2.5V  VCC  5.5V

—

ns 1.8V  VCC  2.5V (24FC1026)

ns 2.5V  VCC  5.5V (24FC1026)

ns 1.7V  VCC  2.5V

—

ns 2.5V  VCC  4.5V, E-temp

ns 2.5V  VCC  5.5V

—

ns 1.8V  VCC  2.5V (24FC1026)

ns 2.5V  VCC  5.5V (24FC1026)

ns 1.7V  VCC  2.5V

—

TAA Output Valid from Clock

3500

900

400

—

(Note 2)

—

ns 2.5V  VCC  4.5V, E-temp

ns 2.5V  VCC  5.5V

—

ns 1.8V  VCC  2.5V (24FC1026)

ns 2.5V  VCC  5.5V (24FC1026)

—

Bus Free Time: bus time

must be free before a new

transmission can start

4700

1300

500

1.7V  VCC  2.5V

TBUF

—

2.5V  VCC  4.5V, E-temp

2.5V  VCC  5.5V

—

1.8V  VCC  2.5V (24FC1026)

2.5V  VCC  5.5V (24FC1026)

—

TSP Input Filter Spike

Suppression

—

ns All except 24FC1026 (Notes 1 and 3)

(SDA and SCL pins)

TWC Write Cycle Time (byte or

page)

—

Endurance

1,000,000

—

cycles Page mode, 25°C, VCC = 5.5V (Note 4)

Note 1: Not 100% tested. CB = total capacitance of one bus line in pF.

2: As a transmitter, the device must provide an internal minimum delay time to bridge the undefined region

(minimum 300 ns) of the falling edge of SCL to avoid unintended generation of Start or Stop conditions.

3: The combined TSP and VHYS specifications are due to new Schmitt Trigger inputs which provide improved

noise spike suppression. This eliminates the need for a TI specification for standard operation.

4: This parameter is not tested but established by characterization. For endurance estimates in a specific

application, please consult the Total Endurance™ Model which can be obtained from Microchip’s website

at www.microchip.com.

DS20002270E-page 4

 2011-2015 Microchip Technology Inc.

1 2 345 6 7...30

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