Datasheet > 23S08T-5DCG8

23S08T-5DCG8

更新时间： 2023-03-15 00:00:00

品牌	Logo	应用领域
艾迪悌 - IDT		/
页数	文件大小	规格书
6页	59K
描述
Clock Driver

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数据手册

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23S08T-5DCG8 数据手册

IDT23S08T

2.5VZERODELAYCLOCKMULTIPLIER

COMMERCIALTEMPERATURERANGE

PINCONFIGURATION

ABSOLUTEMAXIMUMRATINGS⁽¹⁾

Symbol

Rating

Max.

–0.5to+4.6

–0.5to+5.5

–0.5to

Unit

VDD

SupplyVoltageRange

InputVoltageRange(REF)

InputVoltageRange

(exceptREF)

(2)

REF

FBK

CLKA1

CLKA4

CLKA3

V^DD

VDD+0.5

–50

IIK (VI < 0)

InputClampCurrent

ContinuousOutputCurrent

CLKA2

±50

VDD

(VO = 0 to VDD)

VDD or GND

TA = 55°C

GND

CLKB1

CLKB2

GND

ContinuousCurrent

±100

0.7

MaximumPowerDissipation

CLKB4

CLKB3

(3)

(instillair)

TSTG

StorageTemperatureRange

CommercialTemperature

Range

–65to+150

0 to +70

° C

Operating

Temperature

NOTES:

1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may

cause permanent damage to the device. This is a stress rating only and functional

operation of the device at these or any other conditions above those indicated in the

operational sections of this specification is not implied. Exposure to absolute maximum

rating conditions for extended periods may affect reliability.

SOIC

TOP VIEW

2. The input and output negative-voltage ratings may be exceeded if the input and output

clamp-current ratings are observed.

3. The maximum package power dissipation is calculated using a junction temperature

^{of 150}°C and a board trace length of 750 mils.

PINDESCRIPTION

Pin Number

FunctionalDescription

REF ⁽¹⁾

CLKA1⁽²⁾

CLKA2⁽²⁾

VDD

InputReferenceClock,3.3VTolerantInput

Clock Output for Bank A

2.5V Supply

GND

Ground

CLKB1⁽²⁾

CLKB2⁽²⁾

S2⁽³⁾

Clock Output for Bank B

SelectInput, Bit2

APPLICATIONS:

• SDRAM

• Telecom

S1⁽³⁾

SelectInput, Bit1

• Datacom

• PC Motherboards/Workstations

• Critical Path Delay Designs

CLKB3⁽²⁾

CLKB4⁽²⁾

GND

Clock Output for Bank B

Ground

VDD

2.5V Supply

CLKA3⁽²⁾

CLKA4⁽²⁾

FBK

Clock Output for Bank A

PLLFeedbackInput

NOTES:

1. Weak pull down.

2. Weak pull down on all outputs.

3. Weak pull ups on these inputs.

123 4 5 6

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