SEMICONDUCTOR ENHANCED ELEMENT EVALUATION
Mil-PRF-
38534
Subgroup Class
K
Test
Mil-STD-750
Quantity
Reference
Paragraph
Method
Condition
(accept number)
Element Electrical
A. May perform at wafer level
B. All failures shall be removed
from the lot
Perform at room
ambient
1
2
X
100%
C.3.3.1
C.3.3.2
2069, 2070,
2072, 2073
2069, 2070,
X
X
Element Visual
Internal Visual
100%
10(0) or 22(0)
(Notes 1 & 2)
C.3.3.3
C.3.3.4.2
C.3.3.3
3
4
2072, 2073, 2074
X
X
Temperature Cycling
Surge Current
(when applicable)
1051
4066
C
A or B as
specified
X
Constant Acceleration
2006
2001
Y1 direction
20,000 G /
10,000 G for
Pd ≥ 10W
10(0)
22(0)
(See Notes 1 & 2)
X
X
Interim Electrical
C.3.3.4.3
1039
1042
1038
A
B
A
High Temperature
Reverse Bias (HTRB)
Complete
Within 16 hrs of
HTRB
X
Interim Electrical & Delta
completion
1039, 1042
1038
B, A
B
X
X
Burn-In 240 hours
1040
Post Burn-In Electrical
C.3.3.4.3
1026
1037
1042
1048
Steady State Life
1000 hours or equivalent
per MIL-PRF-19500
X
X
X
Final Electrical
C.3.3.4.3
C.3.3.3
C.3.3.5
10(0) wires or
20(1) wires
See method 2018
or 2077 & Note 2
5
6
Wire Bond Evaluation
2011
2018
2077
X
SEM
C.3.3.6
NOTES:
1. Subgroups 3, 4, & 5 shall be performed on a sample of 10 die if the wafer lot is from a QPL/QML line. If the die are
from commercial wafer lots, then the sample size shall be 22 die. Die from QPL/QML wafers not meeting the QPL/QML
requirements and downgraded to commercial grade shall not be used.
2. Subgroups 3, 4 & 5 shall be performed in the order listed in Table 1. Subgroup 6 may be performed at any time.
CODE IDENT NO.
UNSPECIFIED TOLERANCES
SIZE
DWG NO.
REV.
SHEET
F
A
00136
N/A
DOC200103
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