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2101C0M300000FBS PDF预览

2101C0M300000FBS

更新时间: 2023-05-15 00:00:00
品牌 Logo 应用领域
美高森美 - MICROSEMI /
页数 文件大小 规格书
26页 1219K
描述
CMOS Output Clock Oscillator,

2101C0M300000FBS 数据手册

 浏览型号2101C0M300000FBS的Datasheet PDF文件第20页浏览型号2101C0M300000FBS的Datasheet PDF文件第21页浏览型号2101C0M300000FBS的Datasheet PDF文件第22页浏览型号2101C0M300000FBS的Datasheet PDF文件第23页浏览型号2101C0M300000FBS的Datasheet PDF文件第25页浏览型号2101C0M300000FBS的Datasheet PDF文件第26页 
MICROCIRCUIT ENHANCED ELEMENT EVALUATION  
Mil-PRF-  
38534  
Subgroup Class  
K
Test  
Mil-STD-883  
Quantity  
Reference  
Paragraph  
Method  
Condition  
(accept number)  
Element Electrical  
A. May perform at wafer level  
B. All failures shall be removed  
from the lot  
1
X
100%  
C.3.3.1  
C. Perform at room ambient  
2
3
4
X
X
Element Visual  
Internal Visual  
2010  
2010  
100%  
10(0) or 22(0)  
(See Notes 1 & 2)  
C.3.3.2  
C.3.3.3  
C.3.3.4.2  
X
X
Temperature Cycling  
Mechanical Shock  
or  
1010  
2002  
C
B, Y1  
direction  
3,000 G, Y1  
direction  
C.3.3.3  
10(0)  
22(0)  
(See Notes 1 & 2)  
Constant Acceleration  
2001  
X
X
Interim Electrical  
Burn-In  
C.3.3.4.3  
240 hours  
minimum at  
+125°C  
1015  
1005  
X
X
X
Post Burn-In Electrical  
Steady State Life  
Final Electrical  
C.3.3.4.3  
C.3.3.4.3  
10(0) wires or  
20(1) wires  
See method 2018  
& Note 2  
C.3.3.3  
C.3.3.5  
5
6
X
X
Wire Bond Evaluation  
SEM  
2011  
2018  
C.3.3.6  
NOTES:  
1. Subgroups 3, 4, & 5 shall be performed on a sample of 10 die if the wafer lot is from a QPL/QML line. If the die are  
from commercial wafer lots, then the sample size shall be 22 die. Die from QPL/QML wafers not meeting the QPL/QML  
requirements and downgraded to commercial grade shall not be used.  
2. Subgroups 3, 4 & 5 shall be performed in the order listed in Table 1. Subgroup 6 may be performed at any time.  
CODE IDENT NO.  
UNSPECIFIED TOLERANCES  
SIZE  
DWG NO.  
REV.  
SHEET  
F
A
00136  
N/A  
DOC200103  
24  

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