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10AX032E3F27E2LG PDF预览

10AX032E3F27E2LG

更新时间: 2024-01-27 02:19:39
品牌 Logo 应用领域
英特尔 - INTEL 可编程逻辑
页数 文件大小 规格书
110页 1391K
描述
Field Programmable Gate Array, 320000-Cell, CMOS, PBGA672, 27 X 27 MM, ROHS COMPLIANT, FBGA-672

10AX032E3F27E2LG 技术参数

是否Rohs认证:符合生命周期:Active
包装说明:27 X 27 MM, ROHS COMPLIANT, FBGA-672Reach Compliance Code:compliant
HTS代码:8542.39.00.01风险等级:5.38
Is Samacsys:NJESD-30 代码:S-PBGA-B672
长度:27 mm输入次数:240
逻辑单元数量:320000输出次数:240
端子数量:672最高工作温度:100 °C
最低工作温度:封装主体材料:PLASTIC/EPOXY
封装代码:BGA封装等效代码:BGA672,26X26,40
封装形状:SQUARE封装形式:GRID ARRAY
峰值回流温度(摄氏度):NOT SPECIFIED电源:0.9 V
可编程逻辑类型:FIELD PROGRAMMABLE GATE ARRAY认证状态:Not Qualified
座面最大高度:3.25 mm子类别:Field Programmable Gate Arrays
最大供电电压:0.93 V最小供电电压:0.87 V
标称供电电压:0.9 V表面贴装:YES
技术:CMOS温度等级:OTHER
端子形式:BALL端子节距:1 mm
端子位置:BOTTOM处于峰值回流温度下的最长时间:NOT SPECIFIED
宽度:27 mmBase Number Matches:1

10AX032E3F27E2LG 数据手册

 浏览型号10AX032E3F27E2LG的Datasheet PDF文件第6页浏览型号10AX032E3F27E2LG的Datasheet PDF文件第7页浏览型号10AX032E3F27E2LG的Datasheet PDF文件第8页浏览型号10AX032E3F27E2LG的Datasheet PDF文件第10页浏览型号10AX032E3F27E2LG的Datasheet PDF文件第11页浏览型号10AX032E3F27E2LG的Datasheet PDF文件第12页 
A10-DATASHEET  
2015.12.31  
9
HPS Power Supply Operating Conditions  
Symbol  
Description  
Condition (15)  
Minimum (13)  
Typical  
Maximum  
Unit  
VCCH_GXB[L,R]  
Transceiver high voltage power  
supply  
1.710  
1.8  
1.890  
V
Related Information  
Transceiver Performance for Arria 10 GT Devices on page 26  
Provides the data rate ranges for different transceiver speed grades.  
Transceiver Performance for Arria 10 GX/SX Devices on page 23  
Provides the data rate ranges for different transceiver speed grades.  
Arria 10 GX, GT, and SX Device Family Pin Connection Guidelines  
HPS Power Supply Operating Conditions  
Table 6: HPS Power Supply Operating Conditions for Arria 10 SX Devices—Preliminary  
This table lists the steady-state voltage and current values expected from Arria 10 system-on-a-chip (SoC) devices with ARM®-based hard processor system  
(HPS). Power supply ramps must all be strictly monotonic, without plateaus. Refer to Recommended Operating Conditions for Arria 10 Devices table for  
the steady-state voltage values expected from the FPGA portion of the Arria 10 SoC devices.  
Symbol  
Description  
Condition  
Minimum (17)  
Typical  
Maximum (17)  
Unit  
HPS processor speed =  
1.2 GHz  
0.87  
0.9  
0.93  
V
HPS core voltage and periphery  
circuitry power supply  
VCCL_HPS  
HPS processor speed =  
1.5 GHz, –1 speed grade  
0.92  
0.95  
0.98  
V
3.0 V  
2.5 V  
1.8 V  
2.85  
2.375  
1.71  
3.0  
2.5  
1.8  
3.15  
2.625  
1.89  
V
V
V
VCCIO_HPS  
HPS I/O buffers power supply  
(15)  
These data rate ranges vary depending on the transceiver speed grade. Refer to Transceiver Performance for Arria 10 GT Devices table for exact data  
rate ranges.  
28.3 Gbps is the maximum data rate for GT channels. 17.4 Gbps is the maximum data rate for GX channels.  
This value describes the budget for the DC (static) power supply tolerance and does not include the dynamic tolerance requirements. Refer to the  
PDN tool for the additional budget for the dynamic tolerance requirements.  
(16)  
(17)  
Arria 10 Device Datasheet  
Send Feedback  
Altera Corporation  

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