Datasheet > ZL50112

ZL50112

更新时间： 2022-04-23 23:00:11

品牌	Logo	应用领域
加拿大卓联 - ZARLINK		/
页数	文件大小	规格书
112页	1041K
描述
128, 256, 512 and 1024 Channel CESoP Processors

阅读下载

获取价格

数据手册

如果您发现信息不准确，欢迎纠错

ZL50112 数据手册

ZL50110/11/12/14

Data Sheet

Device Line Up

There are four products within the ZL50110/11/12/14 family, with capacity as shown in the following table:

Device

TDM Interfaces

Ethernet Packet I/F

Dual 100 Mbps MII or

Notes

Note 1

ZL50114 4 T1, 4 E1, or 1 J2 streams or

4 MVIP/ST-BUS streams at 2.048 Mbps or

Dual Redundant 1000 Mbps GMII/TBI

1 H.110/H-MVIP/ST-BUS streams at

8.192 Mbps

ZL50110 8 T1, 8 E1 or 2 J2 streams or

8 MVIP/ST-BUS streams at 2.048 Mbps or

2 H.110/H-MVIP/ST-BUS streams at

8.192 Mbps

Dual 100 Mbps MII or

Dual Redundant 1000 Mbps GMII/TBI

Note 1

ZL50112 16 T1, 16 E1, 4 J2 streams or

16 MVIP/ST-BUS streams at 2.048 Mbps or

4 H.110/H-MVIP/ST-BUS streams at

8.192 Mbps

Triple 100 Mbps MII or

Dual Redundant 1000 Mbps GMII/TBI

or Single 100 Mbps MII and Single

1000 Mbps GMII/TBI

ZL50111

32 T1, 32 E1, 8 J2, 2 T3, 2 E3 streams or

32 MVIP/ST-BUS streams at 2.048 Mbps or

8 H.110/H-MVIP/ST-BUS streams at

8.192 Mbps

Triple 100 Mbps MII or

Dual Redundant 1000 Mbps GMII/TBI

or Single 100 Mbps MII and Single

1000 Mbps GMII/TBI

Table 1 - Capacity of Devices in the ZL50110/11/14 Family

Note 1: T1/E1/J2 is for unstructured mode, and the H-MVIP/H.110/ST-BUS is for structured mode.

Zarlink Semiconductor Inc.

1 2 345 6 7...112

下载PDF

与ZL50112相关器件

型号	品牌	描述	获取价格	数据表
ZL50112GAG	ZARLINK	128, 256, 512 and 1024 Channel CESoP Processors	获取价格
ZL50112GAG2	ZARLINK	128, 256, 512 and 1024 Channel CESoP Processors	获取价格
ZL50112GAG2	MICROSEMI	Telecom Circuit, 1-Func, PBGA552, 35 X 35 MM, 1.27 MM, LEAD FREE, PLASTIC, BGA-552	获取价格
ZL50114	ZARLINK	128, 256 and 1024 Channel CESoP Processors	获取价格
ZL50114GAG	ZARLINK	128, 256 and 1024 Channel CESoP Processors	获取价格
ZL50114GAG	MICROSEMI	Telecom Circuit, 1-Func, PBGA552, 35 X 35 MM, 1.27 MM PITCH, PLASTIC, MS-034BAR-2, BGA-552	获取价格