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Z8L38010FSC PDF预览

Z8L38010FSC

更新时间: 2024-10-02 03:09:35
品牌 Logo 应用领域
ZILOG 微处理器
页数 文件大小 规格书
115页 673K
描述
MICROPROCESSOR

Z8L38010FSC 数据手册

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ZILOG  
M
ICROPROCESSOR  
PRODUCT SPECIFICATION  
Z380™  
MICROPROCESSOR  
FEATURES  
Static CMOS Design with Low-Power Standby Mode  
Option  
Two-Clock Cycle Instruction Execution Minimum  
Four Banks of On-Chip Register Files  
32-Bit Internal Data Paths and ALU  
Enha nc e d Inte rrup t Ca p a b ilitie s , Inc lud ing  
16-Bit Vector  
Operating Frequency  
- DC-to-18 MHz at 5V  
- DC-to-10 MHz at 3.3V  
Undefined Opcode Trap for Z380Instruction Set  
Enhanced Instruction Set that Maintains Object-Code  
Compatibility with Z80® and Z180Microprocessors  
On-Chip I/O Functions:  
- Six-Memory Chip Selects with Programmable Waits  
- Programmable I/O Waits  
16-Bit (64K) or 32-Bit (4G) Linear Address Space  
16-Bit Data Bus with Dynamic Sizing  
- DRAM Refresh Controller  
100-Pin QFP Package  
GENERAL DESCRIPTION  
The Z380Mic roproc e s sor is a n inte gra te d high-  
performance microprocessorwith fastand efficientthrough-  
put and increased memory addressing capabilities. The  
Z380offers a continuing growth path for present Z80-or  
Z180-based designs, while maintaining Z80® CPU and  
Z180® MPU object-code compatibility. The Z380MPU  
enhancements include an improved 280 CPU, expanded  
4-Gbyte space and flexible bus interface timing.  
32-bit address space. Additions made to the instruction  
set, include a full complement of 16-bit arithmetic and  
logical operations, 16-bit I/O operations, multiply and  
divide, plus a complete set of register-to-register loads  
and exchanges.  
The expanded basic register file of the Z80 MPU micropro-  
cessor includes alternate register versions of the IX and IY  
registers. There are four sets of this basic Z80 micropro-  
cessor register file present in the Z380 MPU, along with the  
necessary resources to manage switching between the  
different register sets. All of the register-pairs and index  
registers in the basic Z80 microprocessor register file are  
expanded to 32 bits.  
An enhanced version of the Z80 CPU is key to the Z380  
MPU. The basic addressing modes of the Z80 micropro-  
cessor have been augmented as follows: Stack Pointer  
Relative loads and stores, 16-bit and 24-bit indexed off-  
sets, and more flexible Indirect Register addressing, with  
all of the addressing modes allowing access to the entire  
PS010001-0301  

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